Self power down integrated circuit
First Claim
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1. A method for providing a suspend mode in an integrated circuit (IC) comprising:
- providing a suspend instruction to an internal configuration access port (ICAP) of the IC, wherein the ICAP provides access to a configuration block to enable writing data in a configuration memory;
decoding the suspend instruction in the configuration block;
preserving a configuration memory state of the IC after decode of the suspend instruction to prepare for a low power mode;
preserving an internal register state of the IC after decode of the suspend instruction to prepare for a low power mode;
entering the low power mode after decode of the suspend instruction, wherein the ICAP is powered down in the low power mode;
providing a wakeup signal to the configuration block of the IC; and
entering a high power mode in response to the wakeup signal while maintaining the configuration memory state and the internal register state of the IC.
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Abstract
A suspend mode is provided that can be asserted using an Internal Configuration Access Port (ICAP) of an integrated circuit such as a Field Programmable Gate Array (FPGA), as supposed to a dedicated external suspend pin typically accessed by a device external to the FPGA. The ICAP is designed to assert the suspend mode through a configuration block to maintain the state of the configuration memory array while lowering power, in a similar manner to when an external suspend pin is accessed. Internal circuits can, thus, be used to assert a suspend mode through the ICAP.
15 Citations
13 Claims
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1. A method for providing a suspend mode in an integrated circuit (IC) comprising:
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providing a suspend instruction to an internal configuration access port (ICAP) of the IC, wherein the ICAP provides access to a configuration block to enable writing data in a configuration memory; decoding the suspend instruction in the configuration block; preserving a configuration memory state of the IC after decode of the suspend instruction to prepare for a low power mode; preserving an internal register state of the IC after decode of the suspend instruction to prepare for a low power mode; entering the low power mode after decode of the suspend instruction, wherein the ICAP is powered down in the low power mode; providing a wakeup signal to the configuration block of the IC; and entering a high power mode in response to the wakeup signal while maintaining the configuration memory state and the internal register state of the IC. - View Dependent Claims (2, 3, 4, 5)
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6. A method for providing a suspend mode in an integrated circuit (IC) comprising:
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providing a suspend mode interrupt signal to an internal configuration access port (ICAP) of the IC, wherein the ICAP provides access to a configuration block to enable writing data in a configuration memory; identifying the suspend mode interrupt signal in the configuration block; maintaining a configuration memory state and an internal register state of the IC using the configuration block after identification of the interrupt signal, while entering a low power mode, wherein the ICAP is powered down in the low power mode; providing a wakeup signal to the configuration block of the IC; and entering a high power mode in response to the wakeup signal while maintaining the configuration memory state and the internal register state of the IC. - View Dependent Claims (7, 8)
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9. An integrated circuit (IC) comprising:
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a configuration memory array; configuration circuitry for programming of the configuration memory array; a configuration block including a state machine to control configuring of the configuration memory array using the configuration circuitry, the state machine adapted to process a suspend instruction to cause the state of the configuration memory array to be maintained and then cause the IC to enter a low power mode; and an internal configuration access port (ICAP) provided internal to the IC for providing the suspend mode instruction to the configuration block; wherein the ICAP is powered down in the low power mode; and wherein the state machine of the configuration block is further adapted to process a wakeup instruction to cause the IC to enter a high power mode while preserving the state of the configuration memory array. - View Dependent Claims (10, 11, 12, 13)
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Specification