Manufacturing method of semiconductor device

• US 8,263,421 B2
• Filed: 11/12/2010
• Issued: 09/11/2012
• Est. Priority Date: 08/17/2007
• Status: Expired due to Fees

• Current Assignee: China Academy of Telecom Technology (China Information Communication Technology Group Co. Ltd.)
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Teduka, Sachiaki, Toriumi, Satoshi, Furuno, Makoto, Jinbo, Yasuhiro, Dairiki, Koji, Kuwabara, Hideaki
• Primary Examiner(s): Nhu, David
• Application Number:
  US12/944,841
• Publication Number:
  US 20110059562A1
• Time in Patent Office: 669 Days
• Field of Search: 438/30, 438/96, 438/149, 438/31, 438/97, 438/474, 438/475, 438/509, 438/513, 438/311, 438/469, 438/687, 438/688, 438/135, 438/142, 257/E21.17, 257/E21.051, 257/E21.058, 257/E21.077, 257/E21.189, 257/E21.229, 257/E21.267, 257/E21.32, 257/E21.411, 257/E21.4
• US Class Current: 438/25
• CPC Class Codes: C23C 16/509 using internal electrodes
• CPC Class Codes: C23C 16/515 using pulsed discharges
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/458 for thin film silicon, e.g. source or drain electrode
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An object is to provide a manufacturing method of a microcrystalline semiconductor film with favorable quality over a large-area substrate. After forming a gate insulating film over a gate electrode, in order to improve quality of a microcrystalline semiconductor film formed in an initial stage, glow discharge plasma is generated by supplying high-frequency powers with different frequencies, and a lower part of the film near an interface with the gate insulating film is formed under a first film formation condition, which is low in film formation rate but results in a good quality film. Thereafter, an upper part of the film is deposited under a second film formation condition with higher film formation rate, and further, a buffer layer is stacked on the microcrystalline semiconductor film.

Claims

1. A manufacturing method of a display device comprising:

forming a gate electrode and a pixel electrode over a substrate having an insulating surface;

forming an insulating film over the gate electrode and the pixel electrode;

introducing the substrate into a vacuum chamber;

forming a lower part of a microcrystalline semiconductor film in a vacuum chamber under a first film formation condition in which glow discharge plasma is generated by superposed application of a first high-frequency power having a frequency with a wavelength of 10 m or longer and a second high-frequency power having a frequency with a wavelength of shorter than 10 m, to an electrode that generates glow discharge plasma; and

depositing an upper part of the microcrystalline semiconductor film under a second film formation condition in which at least one of substrate temperature, power, frequency, flow rate of source gas, and degree of vacuum is different from that under the first film formation condition.

2. The manufacturing method of a display device according to claim 1, wherein:

a semiconductor film containing an n-type impurity element is formed over the microcrystalline semiconductor film;

source and drain electrodes are formed over the semiconductor film containing an n-type impurity element; and

the semiconductor film containing an n-type impurity element is etched to form source and drain regions.

3. The manufacturing method of a display device according to claim 1, wherein the second high-frequency power source is pulse oscillated.

4. The manufacturing method of a display device according to claim 1, wherein the first film formation condition is a film formation condition under which a substrate temperature is higher than or equal to 100°

C. and lower than 300°

C.

5. The manufacturing method of a display device according to claim 1, wherein the insulating film is formed in the vacuum chamber by generating glow discharge plasma by superposed application of the first high-frequency power having a frequency with a wavelength of 10 m or longer and the second high-frequency power having a frequency with a wavelength of shorter than 10 m, to an electrode that generates glow discharge plasma.

6. The manufacturing method of a display device according to claim 1, wherein the insulating film is formed in the vacuum chamber by generating glow discharge plasma by superposed application of a first high-frequency power of 3 MHz to 30 MHz and a second high-frequency power of 30 MHz to 300 MHz, to an electrode that generates glow discharge plasma.

7. The manufacturing method of a display device according to claim 1, further comprising forming a buffer layer over the microcrystalline semiconductor film.

8. A manufacturing method of a display device comprising:

forming a gate electrode and a pixel electrode over a substrate having an insulating surface;

forming an insulating film over the gate electrode and the pixel electrode;

introducing the substrate into a vacuum chamber;

forming a lower part of a microcrystalline semiconductor film in the vacuum chamber under a first film formation condition in which glow discharge plasma is generated by superposed application of a first high-frequency power of 3 MHz to 30 MHz and a second high-frequency power of 30 MHz to 300 MHz, to an electrode that generates glow discharge plasma;

depositing an upper part of the microcrystalline semiconductor film under a second film formation condition in which at least one of substrate temperature, power, frequency, flow rate of source gas, and degree of vacuum is different from that under the first film formation condition.

9. The manufacturing method of a display device according to claim 8, wherein before introducing the substrate into the vacuum chamber, vacuum evacuation is performed so that an atmosphere inside the vacuum chamber has a degree of vacuum that is over 1×

10<sup>−

8</sup> Pa and less than or equal to 1×

10<sup>−

5</sup> Pa, and then a source gas is introduced to form a film over an inner wall of the vacuum chamber.

10. The manufacturing method of a display device according to claim 8, wherein before introducing the substrate into the vacuum chamber, vacuum evacuation is performed so that an atmosphere inside the vacuum chamber has a degree of vacuum that is over 1×

10<sup>−

8</sup> Pa and less than or equal to 1×

10<sup>−

5</sup> Pa, and then hydrogen gas or a rare gas is introduced to generate plasma.

11. The manufacturing method of a display device according to claim 8, wherein hydrogen gas or a rare gas is introduced to generate plasma after the substrate is introduced into the vacuum chamber.

12. The manufacturing method of a display device according to claim 8, wherein:

a semiconductor film containing an n-type impurity element is formed over the buffer layer;

source and drain electrodes are formed over the semiconductor film containing an n-type impurity element;

the semiconductor film containing an n-type impurity element is etched to form source and drain regions; and

a portion of the buffer layer is etched and removed such that regions overlapping the source and drain regions are left remaining.

13. The manufacturing method of a display device according to claim 8, wherein the second high-frequency power source is pulse oscillated.

14. The manufacturing method of a display device according to claim 8, wherein the first film formation condition is a film formation condition under which a substrate temperature is higher than or equal to 100°

C. and lower than 300°

C.

15. The manufacturing method of a display device according to claim 8, further comprising forming a buffer layer over the microcrystalline semiconductor film.