Dielectric punch-through stoppers for forming FinFETs having dual fin heights
First Claim
1. A semiconductor structure comprising:
- a semiconductor substrate comprising a first portion and a second portion;
a first shallow trench isolation (STI) region and a second STI region, wherein the first STI region has a first top surface substantially level with a second top surface of the second STI region;
a first Fin field-effect transistor (FinFET) over the first portion of the semiconductor substrate, wherein the first FinFET comprises a first fin having a first fin height, wherein the first fin is adjacent to and above the first STI region;
a second FinFET over the second portion of the semiconductor substrate, wherein the second FinFET comprises a second fin having a second fin height different from the first fin height, wherein the second fin is adjacent to and above the second STI region, and wherein a first top surface of the first fin is substantially level with a second top surface of the second fin;
a punch-through stopper underlying and adjoining the first FinFET, wherein the punch-through stopper isolates the first fin from the first portion of the semiconductor substrate, and wherein the punch-through stopper is formed of a dielectric material that is an oxidized portion of the first fin; and
an additional fin underlying and at least partially vertically overlapping the first fin, wherein the punch-through stopper electrically disconnects the additional fin from the first fin.
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Abstract
A semiconductor structure includes a semiconductor substrate having a first portion and a second portion. A first Fin field-effect transistor (FinFET) is formed over the first portion of the semiconductor substrate, wherein the first FinFET includes a first fin having a first fin height. A second FinFET is formed over the second portion of the semiconductor substrate, wherein the second FinFET includes a second fin having a second fin height different from the first fin height. A top surface of the first fin is substantially level with a top surface of the second fin. A punch-through stopper is underlying and adjoining the first FinFET, wherein the punch-through stopper isolates the first fin from the first portion of the semiconductor substrate.
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Citations
11 Claims
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1. A semiconductor structure comprising:
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a semiconductor substrate comprising a first portion and a second portion; a first shallow trench isolation (STI) region and a second STI region, wherein the first STI region has a first top surface substantially level with a second top surface of the second STI region; a first Fin field-effect transistor (FinFET) over the first portion of the semiconductor substrate, wherein the first FinFET comprises a first fin having a first fin height, wherein the first fin is adjacent to and above the first STI region; a second FinFET over the second portion of the semiconductor substrate, wherein the second FinFET comprises a second fin having a second fin height different from the first fin height, wherein the second fin is adjacent to and above the second STI region, and wherein a first top surface of the first fin is substantially level with a second top surface of the second fin; a punch-through stopper underlying and adjoining the first FinFET, wherein the punch-through stopper isolates the first fin from the first portion of the semiconductor substrate, and wherein the punch-through stopper is formed of a dielectric material that is an oxidized portion of the first fin; and an additional fin underlying and at least partially vertically overlapping the first fin, wherein the punch-through stopper electrically disconnects the additional fin from the first fin. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A semiconductor structure comprising:
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a semiconductor substrate comprising a first portion and a second portion; a first Fin field-effect transistor (FinFET) over the first portion of the semiconductor substrate, wherein the first FinFET comprises a first fin having a first fin height; a second FinFET over the second portion of the semiconductor substrate, wherein the second FinFET comprises a second fin having a second fin height different from the first fin height, and wherein a first top surface of the first fin is substantially level with a second top surface of the second fin; a first shallow trench isolation (STI) region adjacent the first fin, wherein the first fin is above the first STI region; a second STI region adjacent the second fin, wherein the second fin is above the second STI region, and wherein the first STI region has a first top surface substantially level with a second top surface of the second STI region; and a punch-through stopper underlying and adjoining the first FinFET, wherein the punch-through stopper isolates the first fin from the first portion of the semiconductor substrate, and wherein the punch-through stopper is an oxidized portion of the first fin. - View Dependent Claims (8, 9, 10, 11)
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Specification