ESD/antenna diodes for through-silicon vias
First Claim
Patent Images
1. An integrated circuit device comprising:
- a semiconductor substrate;
a TSV passing through the substrate and having an exclusion zone laterally adjacent thereto;
a transistor having a diffusion region in the substrate, a gate conductor and a gate dielectric separating the gate conductor from the substrate, the diffusion region being disposed outside the exclusion zone;
a first region disposed in the substrate and at least partially within the exclusion zone, the first region being doped to exhibit a first conductivity type, the substrate in at least a second region adjacent to the first region being doped to exhibit a second conductivity type opposite the first conductivity type; and
an M1 layer conductor interconnecting the TSV, the first region, and a member of the group consisting of the diffusion region and the gate conductor.
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Abstract
Roughly described, an antenna diode is formed at least partially within the exclusion zone around a TSV, and is connected to the TSV by way of a metal 1 layer conductor at the same time that the TSV is connected to either the gate poly or a diffusion region of one or more transistors placed outside the exclusion zone.
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Citations
33 Claims
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1. An integrated circuit device comprising:
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a semiconductor substrate; a TSV passing through the substrate and having an exclusion zone laterally adjacent thereto; a transistor having a diffusion region in the substrate, a gate conductor and a gate dielectric separating the gate conductor from the substrate, the diffusion region being disposed outside the exclusion zone; a first region disposed in the substrate and at least partially within the exclusion zone, the first region being doped to exhibit a first conductivity type, the substrate in at least a second region adjacent to the first region being doped to exhibit a second conductivity type opposite the first conductivity type; and an M1 layer conductor interconnecting the TSV, the first region, and a member of the group consisting of the diffusion region and the gate conductor. - View Dependent Claims (2, 3, 4, 5, 6)
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7. An integrated circuit device comprising:
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a semiconductor substrate; a TSV passing through the substrate; a transistor having a diffusion region in the substrate, a gate conductor and a gate dielectric separating the gate conductor from the substrate, the diffusion region being disposed entirely beyond 0.5 microns from the TSV; a first region disposed in the substrate and at least partially within 0.5 micron from the TSV, the first region being doped to exhibit a first conductivity type, the substrate in at least a second region adjacent to the first region being doped to exhibit a second conductivity type opposite the first conductivity type; and an M1 layer conductor interconnecting the TSV, the first region, and a member of the group consisting of the diffusion region and the gate conductor. - View Dependent Claims (8, 9, 10, 11, 12)
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13. An integrated circuit device comprising:
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a semiconductor substrate; a TSV passing through the substrate; a transistor having a diffusion region, a gate conductor and a gate dielectric separating the gate conductor from the substrate, the diffusion region being disposed in the substrate; a first region disposed in the substrate and surrounding the TSV laterally, the first region being doped to exhibit a first conductivity type, the substrate in at least a second region adjacent to the first region being doped to exhibit a second conductivity type opposite the first conductivity type; and an M1 layer conductor interconnecting the TSV, the first region, and a member of the group consisting of the diffusion region and the gate conductor. - View Dependent Claims (14, 15, 16, 17)
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18. An integrated circuit device comprising:
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a semiconductor substrate; a TSV passing through the substrate; a plurality of transistors on the substrate, each having first and second diffusion regions, a gate dielectric and a gate conductor overlying the gate dielectric, the plurality of transistors including a particular transistor having a particular diffusion region, a particular gate dielectric and a particular gate conductor overlying the particular gate dielectric; a subject region distinct from all the diffusion regions of all the transistors on the substrate, the subject region being doped to exhibit a first conductivity type, the substrate in at least a second region adjacent to the subject region being doped to exhibit a second conductivity type opposite the first conductivity type; and an M1 layer conductor interconnecting the TSV, the subject region, and a member of the group consisting of the particular diffusion region and the gate conductor, wherein the point of the subject region which is nearest the TSV is closer to the TSV than the nearest point to the TSV of the diffusion regions of all of the transistors on the substrate. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25, 26, 27)
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28. An integrated circuit device comprising:
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a semiconductor substrate; a TSV passing through the substrate; a plurality of transistors in the substrate, each having a gate terminal; a plurality of antenna diodes in the substrate, each connected to one or more of the gate terminals of transistors in the plurality, each antenna diode in the substrate occupying a respective lateral area in the substrate; an M1 layer conductor interconnecting the TSV, a particular one of the gate conductors, and a particular one of the antenna diodes, wherein the particular antenna diode occupies a lateral area which is larger than the average area occupied laterally by all antenna diodes in the substrate which are not connected to a TSV. - View Dependent Claims (29, 30, 31, 32, 33)
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Specification