Backside metal of redistribution line with silicide layer on through-silicon via of semiconductor chips

• US 8,264,077 B2
• Filed: 12/29/2008
• Issued: 09/11/2012
• Est. Priority Date: 12/29/2008
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Chiou, Wen-Chih, Wu, Weng-Jin
• Primary Examiner(s): Pham, Thanh V
• Application Number:
  US12/345,239
• Publication Number:
  US 20100164109A1
• Time in Patent Office: 1,352 Days
• Field of Search: 257/698, 257/723, 257/730, 257/733, 257/E23.011, 438/667
• US Class Current: 257/698
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/6834 used to protect an active side of a device or wafer
• CPC Class Codes: H01L 2224/0231 Manufacturing methods of the redistribution layers
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/0557 the external layer being disposed on a via connection of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/13025 the bump connector being disposed on a via connection of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/1308 being stacked
• CPC Class Codes: H01L 2224/13082 Two-layer arrangements
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/13147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/13155 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/1357 Single coating layer
• CPC Class Codes: H01L 2224/13644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/81001 involving a temporary auxiliary member not forming part of the bonding apparatus
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 2225/06513 Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06541 : Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV] manufacturing via connections per se H01L21/76898
• CPC Class Codes: H01L 23/481 : Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 24/03 : Manufacturing methods
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/11 : Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 2924/00013 : Fully indexed content
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/0002 : Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01327 : Intermediate phases, i.e. intermetallics compounds
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19043 : being a resistor

Abstract

An integrated circuit structure includes a semiconductor substrate having a front side and a backside. A through-silicon via (TSV) penetrates the semiconductor substrate. The TSV has a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is over the backside of the semiconductor substrate and connected to the back end of the TSV. A silicide layer is over and contacting the RDL.

Claims

1. An integrated circuit structure comprising:

a semiconductor substrate comprising a front side and a backside;

a through-silicon via (TSV) penetrating the semiconductor substrate, the TSV comprising a back end extending to the backside of the semiconductor substrate;

a redistribution line (RDL) over the backside of the semiconductor substrate and connected to the back end of the TSV;

a silicide layer over and adjoining the RDL;

an active circuit on the front side of the semiconductor substrate, wherein the active circuit and the RDL are on opposite sides of the semiconductor substrate;

a passivation layer over the RDL; and

an opening in the passivation layer, and directly over a portion of the RDL, wherein the opening penetrates through the silicide layer, and wherein the portion of the RDL is exposed through the opening.

2. The integrated circuit structure of claim 1, wherein the RDL comprises copper, and wherein the silicide layer comprises copper silicide.

3. The integrated circuit structure of claim 1, wherein the opening is spaced apart from the RDL by the silicide layer.

4. The integrated circuit structure of claim 1 further comprising a nickel layer in the opening, and a gold layer over the nickel layer.

5. The integrated circuit structure of claim 1, wherein a sidewall of the RDL is overlapped by the opening.

6. The integrated circuit structure of claim 1, wherein the passivation layer comprises an oxide-containing dielectric material.

7. The integrated circuit structure of claim 1, wherein the silicide layer comprises a horizontal portion adjoining a top surface of the RDL, and a sidewall portion on a first sidewall of the RDL, wherein the RDL further comprises a second sidewall, with the first and the second sidewalls being opposite sidewalls, and wherein the silicide layer does not extend on the second sidewall of the RDL.

8. An integrated circuit structure comprising:

a semiconductor substrate comprising a front side and a backside;

a through-silicon via (TSV) penetrating the semiconductor substrate, the TSV comprising a back end extending beyond the backside of the semiconductor substrate;

a redistribution line (RDL) over the backside of the semiconductor substrate and connected to the back end of the TSV, wherein the RDL comprises copper;

a silicide layer over and adjoining the RDL, wherein the silicide layer comprises copper silicide;

a passivation layer over and adjoining the RDL;

an opening in the passivation layer and the silicide layer, wherein a portion of the RDL is exposed through the opening;

a metal finish in the opening and contacting the RDL; and

an active circuit on the front side of the semiconductor substrate, wherein the active circuit and the RDL are on opposite sides of the semiconductor substrate.

9. The integrated circuit structure of claim 8, wherein the passivation layer comprises an oxide-containing dielectric material.

10. The integrated circuit structure of claim 8, wherein the metal finish is in physical contact with the RDL.

11. The integrated circuit structure of claim 8, wherein the metal finish is in physical contact with the silicide layer, and is spaced apart from the RDL by the silicide layer.

12. The integrated circuit structure of claim 8, wherein the metal finish comprises a nickel layer, and a gold layer over the nickel layer.

13. The integrated circuit structure of claim 8, wherein an entirety of the metal finish is directly over the RDL.

14. The integrated circuit structure of claim 8, wherein the metal finish comprises a first portion directly over the RDL, and a second portion on a sidewall of the RDL.

15. The integrated circuit structure of claim 8, wherein the silicide layer comprises a horizontal portion adjoining a top surface of the RDL, and a sidewall portion on a first sidewall of the RDL, wherein the RDL further comprises a second sidewall, with the first and the second sidewalls being opposite sidewalls, and wherein the silicide layer does not extend on the second sidewall of the RDL.

16. The integrated circuit structure of claim 15, wherein substantially all sidewalls of the RDL are in contact with the silicide layer.