Electronic circuit control element with tap element

• US 8,264,858 B2
• Filed: 02/17/2012
• Issued: 09/11/2012
• Est. Priority Date: 05/27/2003
• Status: Expired due to Fees

• Current Assignee: Power Integrations Incorporated
• Original Assignee: Power Integrations Incorporated
• Inventors: Disney, Donald R.
• Primary Examiner(s): Vu, Bao Q
• Application Number:
  US13/399,755
• Publication Number:
  US 20120146141A1
• Time in Patent Office: 207 Days
• Field of Search: 363/21.1, 363/21.04, 363/21.12, 363/18, 363/19, 363/20
• US Class Current: 363/21.1
• CPC Class Codes: G05F 1/14 using tap transformers or tap changing inductors as final control devices
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/0653 adjoining the input or output region of a field-effect device, e.g. the source or drain region
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7803 structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H02M 1/0009 Devices or circuits for detecting current in a converter
• CPC Class Codes: H02M 1/36 Means for starting or stopping converters
• CPC Class Codes: H02M 3/335 using semiconductor devices only
• CPC Class Codes: H02M 3/33507 with automatic control of the output voltage or current, e.g. flyback converters H02M3/33561, H02M3/33569 take precedence
• CPC Class Codes: H02M 3/33553 with galvanic isolation between input and output of both the power stage and the feedback loop
• CPC Class Codes: H02M 3/33561 having more than one ouput with independent control

Abstract

A technique for controlling a power supply with power supply control element with a tap element. An example power supply control element includes a power transistor that has first and second main terminals, a control terminal and a tap terminal. A control circuit is coupled to the control terminal. The tap terminal and the second main terminal of the power transistor are to control switching of the power transistor. The tap terminal is coupled to provide a signal to the control circuit substantially proportional to a voltage between the first and second main terminals when the voltage is less than a pinch off voltage. The tap terminal is coupled to provide a substantially constant voltage that is less than the voltage between the first and second main terminals to the control circuit when the voltage between the first and second main terminals is greater than the pinch-off voltage.

Claims

1. A high voltage transistor, comprising:

a drain region of a first conductivity type;

a source region of the first conductivity type;

a tap region of the first conductivity type;

a body region of a second conductivity type, the body region adjoining the source region;

a drift region of the first conductivity type extending from the drain region to the body region;

a tap drift region of the first conductivity type extending from the drain region to the tap region, wherein the tap region adjoins the tap drift region at an end of the tap drift region opposite the drain region; and

means for substantially fixing a voltage between the tap region and the source region to be substantially constant and less than a voltage between the drain region and the source region in response to the voltage between the drain region and the source region exceeding a pinch off voltage.

2. The high voltage transistor of claim 1, further comprising means for depleting the tap drift region of free charge carriers in response to the voltage between the drain region and the source region exceeding a pinch off voltage.

3. The high voltage transistor of claim 1, further comprising means for allowing the voltage at the tap region to track the voltage between the drain region and the source region in response to the voltage between the drain region and the source region being less than the pinch off voltage.

4. The high voltage transistor of claim 1, further comprising a field plate disposed between the drift region and the tap drift region.

5. The high voltage transistor of claim 4, further comprising:

a source electrode coupled to the source region and the field plate;

a drain electrode coupled to the drain region; and

an insulated gate disposed adjacent to the body region.

6. The high voltage transistor of claim 5, wherein the field plate is disposed in dielectric material comprising silicon dioxide.

7. The high voltage transistor of claim 1, wherein the voltage between the tap region and the source region is proportional to the voltage between the drain region and the source region in response to the voltage between the drain region and the source region being less than the pinch off voltage.

8. A high voltage transistor, comprising:

a drain region of N type semiconductor material;

a source region of N type semiconductor material;

an N type tap region of N type semiconductor material;

a body region of P type semiconductor material adjoining the source region;

a drift region of N type semiconductor material extending from the drain region to the body region;

a tap drift region of N type semiconductor material extending from the drain region to the tap region, wherein the tap region adjoins the tap drift region at an end of the tap drift region opposite the drain region; and

P type regions disposed on neighboring sides of the tap drift region for substantially depleting the tap drift region of free charge carriers in response to a voltage between the drain region and the source region exceeding a pinch off voltage, such that a voltage between the tap region and the source region is substantially constant and less than the voltage between the drain region and the source region.

9. The high voltage transistor of claim 8, wherein the P type regions disposed on the neighboring sides of the tap drift region are configured to allow the voltage at the tap region to track the voltage between the drain region and the source region in response to the voltage between the drain region and the source region being less than the pinch off voltage.

10. The high voltage transistor of claim 8, further comprising a field plate disposed between the drift region and the tap drift region.

11. The high voltage transistor of claim 10, further comprising:

a source electrode coupled to the source region and the field plate;

a drain electrode coupled to the drain region; and

an insulated gate disposed adjacent to the body region.

12. The high voltage transistor of claim 11, wherein the field plate is disposed in dielectric material comprising silicon dioxide.

13. The high voltage transistor of claim 8, wherein the voltage between the tap region and the source region is proportional to the voltage between the drain region and the source region in response to the voltage between the drain region and the source region being less than the pinch off voltage.