Method and system for determining symbol boundary timing in a multicarrier data transmission system

• US 8,265,215 B1
• Filed: 12/01/2009
• Issued: 09/11/2012
• Est. Priority Date: 06/09/2004
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: Marvell World Trade Limited (Marvell Technology Group Limited)
• Inventors: Chow, Jacky S., Leung, Pak Hei Matthew, Luk, King-Fuk, Sands, Nicholas Philip, Tang, Eugene Yuk-Yin
• Primary Examiner(s): Ahn, Sam K
• Assistant Examiner(s): Wong, Linda
• Application Number:
  US12/628,738
• Time in Patent Office: 1,015 Days
• Field of Search: 375/219, 375/240.26, 375/240.27, 375/240.28, 375/295, 375/354, 375/355, 375/357, 375/359, 375/362, 375/363, 375/371
• US Class Current: 375/354
• CPC Class Codes: H04L 27/2613 Structure of the reference signals
• CPC Class Codes: H04L 27/2662 Symbol synchronisation
• CPC Class Codes: H04L 27/2675 Pilot or known symbols
• CPC Class Codes: H04L 27/2691 involving interference determination or cancellation

Abstract

Improved techniques for acquiring symbol boundary timing at a receiver of a multicarrier data transmission system during a training sequence are disclosed. One aspect is symbol boundary determination at a receiver wherein minimal interference is used as a criterion in selecting from a plurality of potential symbol boundary timings. The symbol boundary determination at the receiver can be performed in a time domain or a frequency domain manner. Another aspect pertains to an improved training sequence wherein pairs of identical symbols are transmitted by a transmitter. These symbols can be supplied to the transmitter in a time domain or a frequency domain manner.

Claims

1. A symbol timing unit configured to produce a plurality of difference values for a plurality of different potential symbol timing boundaries, the symbol timing unit comprising:

a subtractor configured to subtract (1) a first sample value of a first training symbol from (2) a second sample value of a second training symbol to produce a first difference value of the plurality of difference values;

an absolute value circuit configured to calculate absolute value or magnitude;

an accumulator configured to accumulate an absolute value or magnitude of the first difference value with an absolute value or magnitude of a second difference value of the plurality of difference values computed by the absolute value circuit, wherein the second difference value was previously computed;

a controller configured to facilitate repeating of the subtracting in the subtractor and accumulating in the accumulator over at most a factor of a symbol length;

an estimator configured to estimate noise due to inter-carrier and inter-symbol interference for at least one of the plurality of different potential symbol timing boundaries; and

a comparator configured to select, based on the accumulated difference value produced by the accumulator, a choice of symbol boundary timing with substantially a least estimated noise due to inter-carrier and inter-symbol interference.

2. A symbol timing unit as recited in claim 1, further comprising:

a receive buffer configured to receive the first training symbol and the second training symbol of a plurality of symbols.

3. A symbol timing unit as recited in claim 1, wherein the plurality of difference values pertain to the estimated noise due to inter-carrier and inter-symbol interferences for at least one of the plurality of different potential symbol timing boundaries.

4. A symbol timing unit as recited in claim 3, wherein the symbol timing unit selects a first of the plurality of different potential symbol timing boundaries with the least estimated noise due to inter-carrier and inter-symbol interference as a selected symbol timing boundary.

5. A symbol timing unit as recited in claim 1, wherein the symbol timing unit determines the plurality of difference values for the plurality of different symbol timing boundaries based on time domain processing.

6. A symbol timing unit as recited in claim 1, wherein the symbol timing unit determines the plurality of difference values for the plurality of different potential symbol timing boundaries based on frequency domain processing.

7. A symbol timing unit as recited in claim 1, wherein the symbol timing unit produces the plurality of difference values with respect to at least one pair of identical training symbols.

8. A symbol timing unit as recited in claim 1, wherein the first training symbol is a Quadrature Amplitude Modulation (QAM) or Phase Shift Keying (PSK) symbol.

9. A symbol timing unit as recited in claim 1, wherein the first training symbol includes at least one of a cyclic prefix and a cyclic suffix.

10. A symbol timing unit as recited in claim 1, wherein the first training symbol has a random or pseudo-random characteristic.

11. A symbol timing unit as recited in claim 1, wherein the comparator selects the symbol boundary timing to minimize the noise due to inter-carrier and inter-symbol interference.

12. A symbol timing unit as recited in claim 1, wherein the symbol timing unit is included in at least one receiver of a multicarrier data transmission system.

13. A symbol timing unit as recited in claim 12, wherein the receiver further comprises:

an analog to digital converter for converting analog signals into digital samples.

14. A symbol timing unit as recited in claim 13, wherein the receiver further comprises:

a multicarrier demodulation unit for demodulating the digital samples into the plurality of symbols.

15. A symbol timing unit as recited in claim 14, wherein the receiver further comprises:

a line decoder that decodes the plurality of symbols into data.

16. A symbol timing unit as recited in claim 12, wherein the multicarrier data transmission system further comprises:

at least one transmitter, the transmitter including at least;

a line encoder that encodes data into at least one of the plurality of symbols, wherein the plurality of symbols comprises the first training symbol and the second training symbol;

a switch that selects symbols for transmission from either the first and second training symbols or the symbols pertaining to the encoded data from the line encoder;

a multicarrier modulation unit for modulating the plurality of symbols into modulated symbols; and

a digital-to-analog converter for converting the modulated symbols into analog signals.

17. A symbol timing unit as recited in claim 16, wherein the multicarrier data transmission system further comprises another switch that supplies symbols from either the training symbols or system information to the switch, and

wherein the switch that selects symbols for transmission operates to select either the symbols pertaining to the encoded data from the line encoder or from the symbols provided by the other switch.

18. A symbol timing unit as recited in claim 17, wherein the transmitter further comprises a control unit, and

wherein the switch and the other switch are controlled by the control unit.

19. A symbol timing unit as recited in claim 17, wherein the other switch is used to interleave training symbol information with the system information.

20. A symbol timing unit as recited in claim 16, wherein the transmitter transmits at least one pair of identical training symbols.