Method of constructing a semiconductor device and structure
First Claim
Patent Images
1. A method of manufacturing a semiconductor device, the method comprising:
- providing a first monocrystalline layer comprising first semiconductor regions;
overlaying said first monocrystalline layer with at least one metal layer comprising aluminum or copper;
transferring a second monocrystalline layer comprising second semiconductor regions to a carrier;
annealing said second monocrystalline layer while on said carrier as part of forming at least one transistor on said second monocrystalline layer; and
after said annealing, transferring said second monocrystalline layer to overlay said metal layer;
wherein said annealing comprises a thermal anneal which is greater than 400 degrees Centigrade and wherein said first and second semiconductor regions comprise ion implanted and activated dopants.
1 Assignment
0 Petitions
Accused Products
Abstract
A method of manufacturing a semiconductor device, the method including, providing a first monocrystalline layer including semiconductor regions, overlaying the first monocrystalline layer with an isolation layer, transferring a second monocrystalline layer comprising semiconductor regions to overlay the isolation layer, wherein the first monocrystalline layer and the second monocrystalline layer are formed from substantially different crystal materials; and subsequently etching the second monocrystalline layer as part of forming at least one transistor in the second monocrystalline layer.
554 Citations
12 Claims
-
1. A method of manufacturing a semiconductor device, the method comprising:
-
providing a first monocrystalline layer comprising first semiconductor regions; overlaying said first monocrystalline layer with at least one metal layer comprising aluminum or copper; transferring a second monocrystalline layer comprising second semiconductor regions to a carrier; annealing said second monocrystalline layer while on said carrier as part of forming at least one transistor on said second monocrystalline layer; and after said annealing, transferring said second monocrystalline layer to overlay said metal layer; wherein said annealing comprises a thermal anneal which is greater than 400 degrees Centigrade and wherein said first and second semiconductor regions comprise ion implanted and activated dopants. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
-
Specification