Compact dual receiver architecture for point to point radio

• US 8,275,071 B2
• Filed: 05/17/2007
• Issued: 09/25/2012
• Est. Priority Date: 05/17/2007
• Status: Active Grant

• Current Assignee: Harris Stratex Networks Operating Corporation (Aviat Networks Incorporated)
• Original Assignee: Harris Stratex Networks Operating Corporation (Aviat Networks Incorporated)
• Inventors: Shen, Ying, Theberge, Guy, Villeneuve, Luc, Concilio, Fabio, Nguyen, Thanh, Bourdeau, Richard
• Primary Examiner(s): Payne, David C.
• Assistant Examiner(s): Haider, Syed
• Application Number:
  US11/750,209
• Publication Number:
  US 20080285684A1
• Time in Patent Office: 1,958 Days
• Field of Search: 375/259, 375/260, 375/316, 375/322, 375/324, 375/327, 375/344, 375/345, 375/350, 375/130, 375/133, 375/219, 375/299, 455/112, 455/272, 455/296, 455/313, 455/323, 455/314
• US Class Current: 375/316
• CPC Class Codes: H03D 3/007 by converting the oscillations into two quadrature related signals H03D3/245 takes precedence
• CPC Class Codes: H04L 27/38 Demodulator circuits; Receiver circuits
• CPC Class Codes: H04L 27/3845 using non - coherent demodulation, i.e. not using a phase synchronous carrier

Abstract

A radio frequency receiver comprising a receiver module, an intermediate frequency (“IF”) module, a synthesizer module and a controller module. The receiver module receives a radio frequency signal and provides a baseband in-phase signal and a baseband quadrature signal, eliminates a sideband of the in-phase and quadrature signals to create a first and a second signal, downconverts the first and second signal to a first and a second IF signal, and selects one of the first or second IF signals. The IF module receives the first or second IF signal, performs analog-to-digital conversion on the first or second IF signal, and demodulates the digitally converted IF signal. The synthesizer module receives a programmable reference signal, downconverts the reference signal to an IF feedback signal, downconverts the reference signal to a baseband feedback signal, provides the IF feedback signal to the IF module, and provides the baseband feedback signal to the receiver module. The controller module samples the digitally converted IF signal and provides the programmable reference signal to the synthesizer module to thereby provide a demodulated output signal.

Claims

1. A radio frequency receiver comprising:

a receiver module which receives a radio frequency (“

RF”

) signal and provides a baseband in-phase (“

I”

) signal and a baseband quadrature (“

Q”

) signal, eliminates a sideband of said I signal and a sideband of said Q signal to create a first and a second signal, downconverts said first and second signal to a first and a second intermediate frequency (“

IF”

) signal, and selects one of said first or second IF signals;

an IF module which receives said first or second IF signal, performs analog-to-digital conversion on said first or second IF signal, and demodulates said digitally converted IF signal;

a synthesizer module which receives a programmable reference signal, downconverts said reference signal to an IF feedback signal, downconverts said reference signal to a baseband feedback signal, provides said IF feedback signal to said IF module, and provides said baseband feedback signal to said receiver module;

a controller module comprising an integrated circuit configured to sample said digitally converted IF signal, said integrated circuit comprising a numerically controlled oscillator configured to provide said programmable reference signal to said synthesizer module; and

a temperature compensation module configured to regulate temperature of said radio frequency receiver based on temperature sensed from said IF module;

said controller module configured to provide a demodulated output signal derived from said digitally converted IF signal.

2. The receiver of claim 1 wherein said integrated circuit comprises a digital detector configured to sample said digitally converted IF signal.

3. The receiver of claim 1 wherein said integrated circuit comprises a field programmable gate array.

4. The receiver of claim 1 wherein said temperature compensation module includes a temperature sensor located in proximity to said IF module.

5. The receiver of claim 1 wherein said receiver is a hitless receiver for a cross polarization interference cancellation (“

XPIC”

) application.

6. The receiver of claim 1 wherein said receiver is a dual port receiver for 1:

N space diversity.

7. The receiver of claim 1 wherein said IF module comprises a received signal strength indicator (“

RSSI”

) monitor port.

8. A radio frequency receiver system comprising:

an electronics rack having an electrical backplane;

a plurality of radio frequency (“

RF”

) receivers each operatively connected to said backplane, each receiver comprising;

a receiver module which receives an RF signal and provides a baseband in-phase (“

I”

) signal and a baseband quadrature (“

Q”

) signal, eliminates a sideband of said I signal and a sideband of said Q signal to create a first and a second signal, downconverts said first and second signal to a first and a second intermediate frequency (“

IF”

) signal, and selects one of said first or second IF signals;

an IF module which receives said first or second IF signal, performs analog-to-digital conversion on said first or second IF signal, and demodulates said digitally converted IF signal;

a synthesizer module which receives a programmable reference signal, downconverts said reference signal to an IF feedback signal, downconverts said reference signal to a baseband feedback signal, provides said IF feedback signal to said IF module, and provides said baseband feedback signal to said receiver module;

a programmable reference signal generator comprising an integrated circuit configured to sample said digitally converted IF signal, said integrated circuit comprising a numerically controlled oscillator configured to provide said programmable reference signal to said synthesizer module;

said programmable reference signal generator configured to provide a demodulated output signal derived from said digitally converted IF signal; and

a frequency locking circuit; and

a data processing unit (“

DPU”

) operatively connected to said backplane, said DPU having a first and a second common reference signal generator, wherein each said common reference generator is switchably connected to said programmable reference signal generator via said frequency locking circuit.

9. The system of claim 8 wherein said DPU further comprises a second switch adaptable to switch from a first of said plural receivers to a second of said plural receivers.

10. The system of claim 9 wherein said switching occurs as a result of an error or failure in said first receiver.

11. The system of claim 10 wherein said switching occurs as a function of a quality measurement of said RF or IF signal.

12. The system of claim 11 wherein said quality measurement is selected from the group consisting of:

signal strength, signal to noise ratio, bit error rate, and received power level.

13. The system of claim 8 wherein the number of said plural receivers is selected from the group consisting of:

two, three, four, five, six, seven, and eight.

14. The system of claim 8 wherein said integrated circuit comprises a digital detector configured to sample said digitally converted IF signal.

15. The system of claim 8 wherein said integrated circuit comprises a field programmable gate array.

16. The system of claim 8 further comprising a temperature compensation module configured to regulate temperature of said each receiver based on temperature sensed from said IF module in said each receiver.

17. The system of claim 16 wherein said temperature compensation module includes a temperature sensor located in proximity to said IF module.

18. A method for receiving a signal comprising the steps of:

providing a co-located modem and receiver in an assembly;

receiving a baseband signal at a receiver module in said receiver;

providing a baseband in-phase (“

I”

) signal and a baseband quadrature (“

Q”

) signal;

eliminating a sideband of said I signal and a sideband of said Q signal to create a first and a second signal;

downconverting said first and second signal to a first and a second intermediate frequency (“

IF”

) signal;

selecting one of said first or second IF signals;

performing analog-to-digital conversion on said first or second IF signal by an IF module;

sampling, using an integrated circuit, said digitally converted IF signal;

providing, using a numerically controlled oscillator in said integrated circuit, a reference signal as a function of said sampled IF signal;

providing a baseband feedback signal to said receiver module as a function of said reference signal;

providing an IF feedback signal to said IF module as a function of said reference signal;

demodulating said digitally converted IF signal to thereby provide a demodulated output signal; and

providing thermal compensation for temperature changes in said receiver based on temperature changes in said IF module.

19. The method of claim 18 wherein said reference signal is a programmable reference signal.

20. The method of claim 19 wherein said integrated circuit comprises a field programmable gate array.

21. The method of claim 18 wherein the step of providing a reference signal further comprises providing a common reference signal to the modem and receiver.

22. The method of claim 18 wherein the step of providing a reference signal further comprises locking a local oscillator to a reference frequency as a function of an alarm.

23. The method of claim 18 further comprising the step of switching to a standby receiver to receive the baseband signal if said receiver fails.

24. The method of claim 18 wherein said receiver is a hitless receiver for a cross polarization interference cancellation application.

25. The method of claim 18 wherein said receiver is a dual port receiver for 1:

N space diversity.

26. The method of claim 18 further comprising the step of monitoring received signal strength.