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Single supply sub VDD bit-line precharge SRAM and method for level shifting

  • US 8,279,687 B2
  • Filed: 05/13/2010
  • Issued: 10/02/2012
  • Est. Priority Date: 05/13/2010
  • Status: Active Grant
First Claim
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1. A pre-charge bit-line circuit for a static random access memory (SRAM) having a plurality of read/write sense amplifiers, and drivers comprising:

  • a regulated power supply source providing a reference voltage less than Vdd;

    a bias circuit having a regulator circuit connected to the power supply and a distributed regulator that is connected to the bit-lines; and

    a level shifting circuit providing a bit-line control signal to activate the bit-line to a full Vdd voltage and return the bit-lines to the reference voltage level.

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