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Thermally balanced via

  • US 8,283,778 B2
  • Filed: 02/16/2007
  • Issued: 10/09/2012
  • Est. Priority Date: 06/14/2005
  • Status: Active Grant
First Claim
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1. A chip, comprising:

  • a wafer portion having a first average coefficient of thermal expansion, wherein the wafer portion includes a via defined by a peripheral sidewall;

    an insulating region having a second average coefficient of thermal expansion, wherein the insulating region is located within the via and covers at least a portion of the peripheral sidewall to a first thickness; and

    a metallic region having a third average coefficient of thermal expansion, wherein the metallic region is located within the via and covers the insulating region to a second thickness;

    wherein the first thickness and the second thickness are such that an average coefficient of thermal expansion of the combination of the insulating region and the metallic region substantially matches the first average coefficient of thermal expansion of the wafer portion as a result of the combined effect of the first and second thicknesses and their respective second and third average coefficients of thermal expansion.

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