Method and unit to process an image signal involving frame rate conversion to improve image quality

• US 8,284,306 B2
• Filed: 08/03/2009
• Issued: 10/09/2012
• Est. Priority Date: 08/07/2008
• Status: Expired due to Fees

• Current Assignee: Saturn Licensing LLC (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Hoshino, Takaya, Miyazaki, Shinichiro, Imai, Seiko
• Primary Examiner(s): Harold, Jefferey
• Assistant Examiner(s): DESIR, JEAN WICEL
• Application Number:
  US12/462,375
• Publication Number:
  US 20100033620A1
• Time in Patent Office: 1,163 Days
• Field of Search: 348/441, 348/451, 348/452, 348/699, 348/700, 348/413.1, 348/416.1, 348/443, 348/459, 382/236, 382/264, 382/275, 375/240.01, 375/240.16, 375/240.27
• US Class Current: 348/441
• CPC Class Codes: H04N 7/0112 one of the standards corresponding to a cinematograph film standard
• CPC Class Codes: H04N 7/013 the incoming video signal comprising different parts having originally different frame rate, e.g. video and graphics
• CPC Class Codes: H04N 7/0132 the field or frame frequency of the incoming video signal being multiplied by a positive integer, e.g. for flicker reduction
• CPC Class Codes: H04N 7/014 involving the use of motion vectors motion estimation and compensation in video coding H04N19/51
• CPC Class Codes: H04N 7/0147 the interpolation using an indication of film mode or an indication of a specific pattern, e.g. 3:2 pull-down pattern

Abstract

An image signal processing unit includes a frame rate conversion circuit performing double frame rate conversion on an input image signal from a first frame frequency to a second frame frequency. When performing frame rate conversion with the motion correction process, a motion vector is determined between a first frame image and a third frame image, and three interpolation frame images are formed through the motion correction process to the first frame image based on the motion vector, and are inserted between the first and third frame images so as to establish the second frame frequency. When performing frame rate conversion without the motion correction process, an interpolation frame image same as the first frame image is inserted between the first and second frame images, and an interpolation frame image same as the second frame image is inserted between the second and third frame images.

Claims

1. An image signal processing unit comprising:

a frame rate conversion circuit converting a frame rate of an input image signal from a first frame frequency to a second frame frequency which is twice the first frame frequency, and selecting whether a motion correction process is performed or not at the time of the frame rate conversion, wherein,

in a case of performing frame rate conversion with the motion correction process, a motion vector is determined between a first frame image and a third frame image in the input image signal, followed by forming three interpolation frame images through performing the motion correction process to the first frame image based on the motion vector, and then the three interpolation frame images are inserted between the first frame image and the third frame image so as to establish the second frame frequency, and

in a case of performing frame rate conversion without the motion correction process, an interpolation frame image having the same content as the first frame image is formed and inserted between the first frame image and a second frame image in the input image signal, and an interpolation frame image having the same content as the second frame image is formed and inserted between the second frame image and the third frame image,

wherein the frame rate conversion circuit includes;

an image memory into which the input image signal is inputted, and outputting a two-frame delayed signal which is delayed by two frames from the input image signal and a three-frame delayed signal which is delayed by three frames from the input image signal,

a first switch into which the two-frame delayed signal and the three-frame delayed signal delayed in the image memory are inputted, and outputting a signal of an odd numbered frame in the input image signal through a switching operation to alternately select either the two-frame delayed signal or the three-frame delayed signal for every frame period,

a second switch into which the output signal from the first switch and the two-frame delayed signal delayed in the image memory are inputted, and selecting and outputting one of the output signal from the first switch and the two-frame delayed signal according to whether the motion correction process is performed or not at the time of the frame rate conversion, and

a conversion circuit performing the frame rate conversion based on the signal selected in the second switch.

2. The image signal processing unit according to claim 1, wherein the input image signal is configured with a synthetic image signal as a synthesis of a first image portion and a second image portion, the first image portion being configured with a first image stream with the first frame frequency where each two successive frames have a same image content, and the second image portion being configured with a second image stream with a frequency same as the first frame frequency.

3. The image signal processing unit according to claim 2, wherein the first image portion is an image stream acquired through performing a 2-2 pull down signal format conversion on a film image, the conversion from a frame frequency half of the first frame frequency to the first frame frequency.

4. A method of processing an image signal comprising:

converting a frame rate of an input image signal from a first frame frequency to a second frame frequency which is twice the first frame frequency; and

selecting whether a motion correction process is performed or not at the time of the frame rate conversion, in the step of converting the frame rate, wherein,

in a case of performing frame rate conversion with the motion correction process, a motion vector is determined between a first frame image and a third frame image in the input image signal, followed by forming three interpolation frame images through performing the motion correction process to the first frame image based on the motion vector, and then the three interpolation frame images are inserted between the first frame image and the third frame image so as to establish the second frame frequency, and

in a case of performing frame rate conversion without the motion correction process, an interpolation frame image having the same content as the first frame image is formed and inserted between the first frame image and a second frame image in the input image signal, and an interpolation frame image having the same content as the second frame image is formed and inserted between the second frame image and the third frame image,

wherein the converting and selecting are performed by a frame rate conversion circuit which includes an image memory, a first switch, a second switch, and a conversion circuit, and

wherein the method further comprises;

inputting the input image signal into the image memory, and outputting a two-frame delayed signal which is delayed by two frames from the input image signal and a three-frame delayed signal which is delayed by three frames from the input image signal,

inputting to the first switch the two-frame delayed signal and the three-frame delayed signal delayed in the image memory, and outputting a signal of an odd numbered frame in the input image signal through a switching operation to alternately select either the two-frame delayed signal or the three-frame delayed signal for every frame period,

inputting to the second switch the output signal from the first switch and the two-frame delayed signal delayed in the image memory, and selecting and outputting one of the output signal from the first switch and the two-frame delayed signal according to whether the motion correction process is performed or not at the time of the frame rate conversion, and

performing the frame rate conversion based on the signal selected in the second switch by utilizing the conversion circuit.