Serial concatenation of interleaved convolutional codes forming turbo-like codes
DC CAFCFirst Claim
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1. An apparatus for performing encoding operations, the apparatus comprising:
- a first set of memory locations to store information bits;
a second set of memory locations to store parity bits;
a permutation module to read a bit from the first set of memory locations and combine the read bit to a bit in the second set of memory locations based on a corresponding index of the first set of memory locations and a corresponding index of the second set of memory locations; and
an accumulator to perform accumulation operations on the bits stored in the second set of memory locations,wherein two or more memory locations of the first set of memory locations are read by the permutation module different times from one another.
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Abstract
A serial concatenated coder includes an outer coder and an inner coder. The outer coder irregularly repeats bits in a data block according to a degree profile and scrambles the repeated bits. The scrambled and repeated bits are input to an inner coder, which has a rate substantially close to one.
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Citations
14 Claims
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1. An apparatus for performing encoding operations, the apparatus comprising:
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a first set of memory locations to store information bits; a second set of memory locations to store parity bits; a permutation module to read a bit from the first set of memory locations and combine the read bit to a bit in the second set of memory locations based on a corresponding index of the first set of memory locations and a corresponding index of the second set of memory locations; and an accumulator to perform accumulation operations on the bits stored in the second set of memory locations, wherein two or more memory locations of the first set of memory locations are read by the permutation module different times from one another. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method of performing encoding operations, the method comprising:
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receiving a sequence of information bits from a first set of memory locations; performing an encoding operation using the received sequence of information bits as an input, said encoding operation comprising; reading a bit from the received sequence of information bits, and combining the read bit to a bit in a second set of memory locations based on a corresponding index of the first set of memory locations for the received sequence of information bits and a corresponding index of the second set of memory locations; and accumulating the bits in the second set of memory locations, wherein two or more memory locations of the first set of memory locations are read by the permutation module different times from one another. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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Specification