Radio frequency integrated circuit and IC module of the same

• US 8,285,242 B2
• Filed: 09/15/2005
• Issued: 10/09/2012
• Est. Priority Date: 09/17/2004
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Miwa, Yohichi, Minami, Aya
• Primary Examiner(s): Nguyen, Duc
• Assistant Examiner(s): Akinyemi, Ajibola
• Application Number:
  US11/227,945
• Publication Number:
  US 20060063506A1
• Time in Patent Office: 2,581 Days
• Field of Search: 455/333
• US Class Current: 455/333
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs

Abstract

A highly convenient radio frequency integrated circuit that can be used at a plurality of different frequency bands, and which can perform communications at the different frequency bands so that data at different frequency bands can be read and a restriction can be imposed on the reading and writing of information. An IC module in a radio frequency integrated circuit includes a plurality of memories; a read-write unit for performing a process of reading data from, and writing data into, the memories; and a selector for receiving an electric signal outputted from an antenna that has received a radio signal.

Claims

1. A radio frequency integrated circuit for use with an RFID tag for use on a commodity, comprising:

an antenna for communicating data by use of radio waves, including detecting a radio signal of a first frequency and detecting a radio signal of a second frequency; and

an IC module for processing and storing data, wherein the IC module comprises;

a plurality of memories;

a read-write unit for performing processes of reading the data from, and writing data into, a target memory of the plurality of memories; and

a selector for receiving an electric signal outputted from the antenna having received a radio signal, and for specifying a first memory of the plurality of memories as a target memory for reading the first target memory in response to detection of said radio signal of said first frequency and for restricting against reading the second memory in response to detection of said radio signal of said first frequency, and for specifying a second memory of the plurality of memories as a target memory for reading the second target memory in response to detection of said radio signal of said second frequency,

wherein the plurality of memories and the read-write unit are in the RFID tag, wherein the first frequency is in the MHz range and the second frequency is higher than the first frequency and is in the UHF range, wherein the read-write unit performs both read and write processes in said first memory as a specified target memory in response to said first frequency of a radio signal, wherein the read-write unit performs both read and write processes in said second memory as a specified target memory for shared memory in response to said first frequency of a radio signal, wherein the read-write unit performs only read processes in said second memory as a specified target memory in response to said second frequency of a radio signal and wherein the second memory contains information for the commodity including information adapted for theft prevention of the commodity and wherein the first memory contains information on the commodity which is more detailed than the information in the second memory;

the radio frequency integrated circuit further comprising;

a PLL circuit adapted to receive the electric signal outputted from the antenna, and generate and output an operating clock based on the outputted electric signal; and

a PLL setting unit adapted to receive one of the electric signal outputted from the antenna and an output signal of the PLL circuit, and dynamically set the PLL circuit based on the one of the electric signal and the output signal so that the PLL circuit generates the operating clock having a fixed frequency,

wherein the read-write unit operates according to the operating clock which has the fixed frequency and which is outputted from the PLL circuit.

2. The radio frequency integrated circuit according to claim 1, wherein the one of the plurality of memories is provided to correspond to a radio signal having a predetermined frequency that is expected to be received by the antenna.

3. The radio frequency integrated circuit according to claim 1, wherein one of the plurality of memories is selected as a target on which the read-write unit performs read and write processes in response to only a specific frequency;

and wherein at least one of the plurality of memories is selected as a target for shared memory on which the read-write unit performs read and write processes in response to a plurality of frequencies.

4. The radio frequency integrated circuit according to claim 3, wherein the selector specifies at least one of the plurality of memories selected as a target for shared memory for data read and write processes in the case where a radio signal has the specific frequency, and specifies at least one of the plurality of memories selected as a target for shared memory for read and write processes in the case where a radio signal has a different frequency.

5. The radio frequency integrated circuit according to claim 3, wherein the selector specifies at least one of the plurality of memories selected as a target for shared memory for data read and write processes in the case where a radio signal has the specific frequency, and specifies at least one of the plurality of memories selected as a target for shared memory for data write process in the case where a radio signal has a different frequency.

6. The radio frequency integrated circuit according to claim 1, wherein the selector specifies one of the plurality of memories specified as a target of a data write process in the case where a radio signal has a specific frequency, as a target of a data read process in the case where a radio signal has a different frequency.

7. The radio frequency integrated circuit according to claim 1, wherein in the case where the selector specifies one of the plurality of memories in compliance to the same frequency, the selector specifies one of the plurality of memories as a target of a data read process and specifies another of the plurality of memories as a target of a data write process.

8. The radio frequency integrated circuit according to claim 1, further comprising a circuit for receiving data and transmitting data;

and a cryptographic circuit, for decrypting data received by the device and for encrypting data to be transmitted by the device.

9. An IC module of a radio frequency integrated circuit for use with an RFID tag for use with a commodity, and for use with an antenna for communicating data by use of radio waves, including detecting a radio signal of a first frequency and detecting a radio signal of a second frequency, the IC module comprising:

a plurality of memories;

a read-write unit for performing processes of reading data from, and writing data into, a target memory of the plurality of memories; and

a selector for receiving an electric signal outputted from the antenna which has received a radio signal, and for specifying a first memory of the plurality of memories as a target memory for reading the first target memory in response to detection of said radio signal of said first frequency and for restricting against reading the second memory in response to detection of said radio signal of said first frequency, and for specifying a second memory of the plurality of memories as a target memory for reading the second target memory in response to detection of said radio signal of said second frequency,

wherein the plurality of memories and the read-write unit are in the RFID tag, wherein the first frequency is in the MHz range and the second frequency is higher than the first frequency and is in the UHF range, wherein the read-write unit performs both read and write processes in said first memory as a specified target memory in response to said first frequency of a radio signal, wherein the read-write unit performs both read and write processes in said second memory as a specified target memory for shared memory in response to said first frequency of a radio signal, wherein the read-write unit performs only read processes in said second memory as a specified target memory in response to said second frequency of a radio signal and wherein the second memory contains information for the commodity including information adapted for theft prevention of the commodity and wherein the first memory contains information on the commodity which is more detailed than the information in the second memory;

the IC module further comprising;

a PLL circuit adapted to receive the electric signal outputted from the antenna, and generate and output an operating clock based on the outputted electric signal; and

a PLL setting unit adapted to receive one of the electric signal outputted from the antenna and an output signal of the PLL circuit, and dynamically set the PLL circuit based on the one of the electric signal and the output signal so that the PLL circuit generates the operating clock having a fixed frequency,

wherein the read-write unit operates according to the operating clock which has the fixed frequency and which is outputted from the PLL circuit.

10. The IC module according to claim 9, wherein the one of the plurality of memories is provided to respectively correspond to radio signals having a predetermined frequency that is expected to be received by the antenna.

11. The IC module according to claim 9, wherein one of the plurality of memories is selected as a target on which the read-write unit performs read and write processes, in response to only a specific frequency;

and one of the plurality of memories is selected as a shared memory targeted for the read-write unit to perform read and write processes in response to a plurality of frequencies.

12. A method for communicating data by use of radio waves, comprising:

detecting a radio signal of a first frequency using a device having a read-write unit, a target memory selector, and a plurality of memories including first and second target memories;

using the read-write unit and the selector, specifying the first target memory and reading the first target memory in response to detection of said radio signal of said first frequency;

using the read-write unit and the selector, restricting against reading the second memory in response to detection of said radio signal of said first frequency;

detecting a radio signal of a second frequency using the device; and

using the read-write unit and the selector, specifying the second target memory and reading the second target memory in response to detection of said radio signal of said second frequency,

wherein the plurality of memories and the read-write unit are in an RFID tag on a commodity, wherein the first frequency is in the MHz range and the second frequency is higher than the first frequency and is in the UHF range, wherein the read-write unit performs both read and write processes in said first memory as a specified target memory in response to said first frequency of a radio signal, wherein the read-write unit performs both read and write processes in said second memory as a specified target memory for shared memory in response to said first frequency of a radio signal, wherein the read-write unit performs only read processes in said second memory as a specified target memory in response to said second frequency of a radio signal and wherein the second memory contains information for the commodity including information adapted for theft prevention of the commodity and wherein the first memory contains information on the commodity which is more detailed than the information in the second memory;

the method further comprising;

using a PLL circuit for receiving an electric signal outputted from an antenna for detecting the radio signal of the first frequency and for detecting the radio signal of the second frequency, and the PLL circuit also for generating and outputting an operating clock based on the outputted electric signal; and

using a PLL setting unit for receiving one of the electric signal outputted from the antenna and an output signal of the PLL circuit, dynamically setting the PLL circuit based on the one of the electric signal and the output signal so that the PLL circuit generates the operating clock having a fixed frequency,

wherein the read-write unit operates according to the operating clock which has the fixed frequency and which is outputted from the PLL circuit.

13. The method of claim 12, wherein one of the plurality of memories is provided to correspond to a radio signal having a predetermined frequency that is expected to be received by the antenna.

14. The method of claim 12, wherein one of the plurality of memories is specified as a target memory on which the read-write unit performs at least one of read and write processes in response to only a specific frequency;

and wherein at least one of the plurality of memories is specified as a target memory for shared memory on which the read-write unit performs at least one of read and write processes in response to a plurality of frequencies.

15. The method of claim 14, wherein the specifying specifies at least one of the plurality of memories specified as a target memory for shared memory for at least one of data read and write processes in the case where a radio signal has the specific frequency, and specifies at least one of the plurality of memories specified as a target memory for shared memory for at least one of read and write processes in the case where a radio signal has a different frequency.

16. The method of claim 14, wherein the specifying specifies at least one of the plurality of memories specified as a target memory for shared memory for at least one of data read and write processes in the case where a radio signal has the specific frequency, and specifies at least one of the plurality of memories specified as a target for shared memory for data write process in the case where a radio signal has a different frequency.

17. The method of claim 12, wherein the specifying specifies one of the plurality of memories specified as a target memory of a data write process in the case where a radio has a specific frequency, and as a target memory of a data read process in the case where a radio signal has a different frequency.

18. The method of claim 14 further comprising:

receiving data;

transmitting data; and

using a cryptographic circuit, decrypting data received by the device and encrypting data to be transmitted by the device.