Apparatus, system and method for buffering audio data to allow low power states in a processing system during audio playback

• US 8,285,557 B2
• Filed: 08/17/2010
• Issued: 10/09/2012
• Est. Priority Date: 09/29/2006
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Sebestian, Pradeep, Proefrock, Wayne
• Primary Examiner(s): Abebe, Daniel D
• Application Number:
  US12/857,687
• Publication Number:
  US 20100312569A1
• Time in Patent Office: 784 Days
• Field of Search: 704/500, 713/320, 713/324, 369/29.02
• US Class Current: 704/500
• CPC Class Codes: G10L 19/167 Audio streaming, i.e. formatting and decoding of an encoded audio signal representation into a data stream for transmission or storage purposes
• CPC Class Codes: G11B 20/00007 Time or data compression or expansion audio compression based on psychoacoustics G10L19/00; data processing for reproducing audio data at different playback speeds G10L21/04; video compression H04N19/00; data compression per se H03M7/30
• CPC Class Codes: G11B 2020/00014 the compressed signal being an audio signal
• CPC Class Codes: G11B 2020/10759 content data

Abstract

An audio data stream from a processing system may be buffered to allow low power states in the processing system during audio playback. An audio buffer may be provided external to the processing system and between the processing system and an audio codec. The audio buffer may also shift to an alternate audio data interface mode when the processing system is in the low power state. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

Claims

1. An apparatus, comprising:

an audio buffer control operative to control buffering of at least one audio data stream received from an audio controller in a processing system, the buffering occurring external to the processing system; and

an audio codec coupled to the audio buffer, the audio codec operative to receive the at least one buffered audio data stream from a buffer external to the processing system when the processing system is in a low power state and to convert the at least one buffered audio data stream into at least one audio output.

2. The apparatus of claim 1, the audio buffer control comprising circuitry operative to control the buffering of the at least one audio data stream in accordance with multiple audio data interface modes.

3. The apparatus of claim 2, the audio codec comprising circuitry operative to convert the buffered audio data stream into the at least one audio output in accordance with multiple protocols corresponding to the multiple audio data interface modes.

4. The apparatus of claim 3, the circuitry in the audio buffer control operative to shift to one of the multiple audio data interface modes in response to the processing system transitioning to the low power state.

5. The apparatus of claim 3, the audio data interface modes comprising a serial pulse code modulation (PCM) interface mode, the circuitry in the audio buffer control operative to shift to the PCM interface mode in response to the processing system transitioning to the low power state.

6. The apparatus of claim 5, the audio data interface modes comprising an audio interface mode based on audio codec 97 (AC97) audio or high definition (HD) audio.

7. The apparatus of claim 1, the audio buffer control and the audio codec integrated on or as part of a single integrated circuit.

8. The apparatus of claim 1, the at least one audio output comprising at least one analog audio output.

9. The apparatus of claim 1, comprising:

at least one memory device coupled to the audio buffer control.

10. The apparatus of claim 1, the audio buffer control operative to transfer the buffered audio data stream to the audio codec independent of a low power state of the processing system.

11. A system, comprising:

a processing system comprising an audio controller configured to control at least one audio data stream, the processing system comprising a plurality of power states including at least one low power state;

an audio buffer coupled to the audio controller and external to the processing system, the audio buffer being configured to receive and buffer the at least one audio data stream from the audio controller; and

an audio codec coupled to the audio buffer, the audio codec operative to receive the at least one buffered audio data stream transferred from the audio buffer while the processing system is in the at least one low power state and to convert the buffered audio data stream into at least one audio output.

12. The system of claim 11, the audio buffer comprising circuitry operative to control the buffering of the audio data stream in accordance with multiple audio data interface modes.

13. The system of claim 12, the audio codec comprising circuitry operative to convert the at least one buffered audio data stream into the at least one audio output in accordance with multiple protocols corresponding to the multiple audio data interface modes.

14. The system of claim 13, the audio data interface modes comprising a serial pulse code modulation (PCM) interface mode, the circuitry in the audio buffer control operative to shift to the PCM interface mode in response to the processing system transitioning to the low power state.

15. The system of claim 11, comprising:

a bus controller coupled to the audio buffer.

16. A computer-implemented method, comprising:

providing at least one audio data stream from an audio controller in a processing system;

buffering the at least one audio data stream external to the processing system;

transitioning the processing system to a low power state;

transferring the at least one buffered audio data stream to an audio codec while the processing system is in the low power state; and

converting the buffered audio data stream into at least one audio output.

17. The computer-implemented method of claim 16, the audio output comprising an analog audio output.

18. The computer-implemented method of claim 16, providing the audio data stream from the audio controller in accordance with an audio data interface mode;

and

shifting to an alternate audio data interface mode when the processing system is in the low power state.

19. The computer-implemented method of claim 18, the audio data interface mode is based on either audio codec 97 (AC97) or a high definition (HD) audio.

20. The computer-implemented method of claim 19, the alternate audio data interface mode comprising a serial audio PCM interface mode.