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System and method for adapting electrical integrity analysis to parametrically integrated environment

  • US 8,286,110 B1
  • Filed: 12/27/2010
  • Issued: 10/09/2012
  • Est. Priority Date: 12/27/2010
  • Status: Active Grant
First Claim
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1. A method for generating a programmably implemented model for emulating signal processing operation of an integrated circuit (IC) core in an electronic system using a computer, the method comprising:

  • establishing a power integrity (PI) topology including behavioral models to emulate a power delivery network (PDN) serving the IC core, said PI topology maintaining at least one supply reference voltage in variable manner responsive to parametric coupling of the PDN with the IC core and an IO interface buffer of the electronic system during operation thereof;

    establishing a signal integrity (SI) topology including behavioral models to emulate analog input, output, and transmission characteristics of the IC core; and

    ,interconnecting said SI topology to said PI topology to form a composite SI/PI topology, said SI topology being thereby;

    executing, by using a computer, alternating current (AC) and transient simulation for the composite SI/PI topology to generate SI integrity analysis data.

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