Interruptible thread synchronization method and apparatus

• US 8,286,166 B2
• Filed: 01/22/2007
• Issued: 10/09/2012
• Est. Priority Date: 02/24/2006
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Chung, Seung-bum, Kim, Soo-jeong
• Primary Examiner(s): Puente, Emerson
• Assistant Examiner(s): Lee, Adam
• Application Number:
  US11/655,928
• Publication Number:
  US 20070204269A1
• Time in Patent Office: 2,087 Days
• Field of Search: None
• US Class Current: 718/100
• CPC Class Codes: G06F 2209/543 Local
• CPC Class Codes: G06F 9/52 Program synchronisation; Mutual exclusion, e.g. by means of semaphores
• CPC Class Codes: G06F 9/542 Event management; Broadcasting; Multicasting; Notifications

Abstract

An interruptible thread synchronization method and apparatus are provided. The interruptible thread synchronization method includes controlling mutually exclusive access to an object by one or more threads using a monitor, and interrupting a first thread that is on standby for the monitor. The interruptible thread synchronization method and apparatus allows for access and control of an object by one or more threads.

Claims

1. An interruptible thread synchronization method for efficiently accessing an object, the method comprising:

controlling an exclusive access to an object by threads, using a monitor; and

interrupting a first one of the threads that are on standby for the monitor;

wherein the first one of the threads is determined by sequentially waking up at least two of the threads that are on standby for the monitor, checking each of the at least two of the threads for a condition, and

when a checked one of the at least two threads meets the condition, selecting the checked one of the at least two threads meeting the condition as the first one of the threads, and placing the checked remaining ones of the at least two threads back on standby,

wherein the selected thread is completely released from the monitor when the selected thread fails to acquire the monitor.

2. The interruptible thread synchronization method of claim 1, wherein the monitor comprises:

a condition variable which indicates a standby condition; and

a counter variable which indicates whether a second one of the threads that has acquired the monitor exists and whether a third one of the threads that is on standby for the condition variable exists.

3. The interruptible thread synchronization method of claim 2, wherein the monitor further comprises a sub-monitor which controls exclusive access to the condition variable and the counter variable by the threads.

4. The interruptible thread synchronization method of claim 2, wherein the counter variable has a nonnegative integer value.

5. The interruptible thread synchronization method of claim 2, wherein the controlling comprises:

enabling the first one of the threads to request the monitor;

increasing a value of the counter variable; and

if the second one of the threads exists, placing the first one of the threads on standby for the condition variable.

6. The interruptible thread synchronization method of claim 2, further comprising reducing a value of the counter variable if the second one of the threads terminates a predetermined operation regarding the object.

7. The interruptible thread synchronization method of claim 2, further comprising, if the third one of the threads exists, outputting a single signal that wakes up the third thread that is on standby for the monitor after the second one of the threads terminates a predetermined operation regarding the object.

8. The interruptible thread synchronization method of claim 1, further comprising controlling exclusive access to predetermined information present in the monitor by the threads.

9. The interruptible thread synchronization method of claim 2, wherein the interrupting comprises:

setting in the first one of the threads information indicating that the first one of the threads is a thread to be interrupted; and

outputting a broadcast signal that sequentially wakes up more than one thread that is on standby for the monitor.

10. The interruptible thread synchronization method of claim 9, wherein the interrupting further comprises:

waking up the first one of the threads in response to the broadcast signal; and

reducing a value of the counter variable.

11. The interruptible thread synchronization method of claim 10, wherein the interrupting further comprises deleting information regarding the monitor from the first one of the threads.

12. A computer-readable recording medium having recorded thereon a computer program for executing the interruptible thread synchronization method of any one of claims 1 through 11.

14. The interruptible thread synchronization method of claim 1, wherein the selected thread deletes information regarding the monitor for which the selected thread has been on standby.

15. The interruptible thread synchronization method of claim 1,

wherein the selected thread is driven to perform another operation or is terminated.

18. The interruptible thread synchronization method of claim 1, wherein the condition is a predetermined condition indicating interruptibility.

13. A digital processing apparatus comprising:

a processor executing one or more modules of the apparatus;

a processing module which executes a program; and

a main storage module which provides memory space that is needed for an operation of the processing module, wherein the program comprises first computer code which controls mutually exclusive access to an object by threads with the aid of a monitor, and second computer code which interrupts a thread from threads that are on standby for the monitor;

wherein the thread to be interrupted is determined by sequentially waking up at least two of the threads that are on standby for the monitor, checking each of the at least two threads for a condition; and

when a checked one of the at least two threads meets the condition, selecting the checked one of the at least two threads meeting the condition as the thread to be interrupted and placing checked remaining ones of the at least two threads back on standby,

wherein the selected thread is completely released from the monitor when the selected thread fails to acquire the monitor.

16. The digital processing apparatus of claim 13, wherein the selected thread deletes information regarding the monitor for which the selected thread has been on standby.

17. The digital processing apparatus of claim 13, wherein the selected thread is driven to perform another operation or is terminated.

19. The digital processing apparatus of claim 13, wherein the condition is a predetermined condition indicating interruptibility.