Integration CMOS compatible of micro/nano optical gain materials

• US 8,288,290 B2
• Filed: 08/29/2008
• Issued: 10/16/2012
• Est. Priority Date: 08/29/2008
• Status: Expired due to Fees

• Current Assignee: BAE Systems Information and Electronic Systems Integration Incorporated (BAE Systems Plc)
• Original Assignee: BAE Systems Information and Electronic Systems Integration Incorporated (BAE Systems Plc)
• Inventors: Carothers, Daniel N.
• Primary Examiner(s): Vinh, Lan
• Assistant Examiner(s): ANGADI, MAKI A
• Application Number:
  US12/201,618
• Publication Number:
  US 20100055919A1
• Time in Patent Office: 1,509 Days
• Field of Search: 438/718, 257/14, 216/37
• US Class Current: 438/718
• CPC Class Codes: G02B 2006/12078 Gallium arsenide or alloys (GaAs, GaAlAs, GaAsP, GaInAs)
• CPC Class Codes: G02B 2006/12097 Ridge, rib or the like
• CPC Class Codes: G02B 6/13 Integrated optical circuits characterised by the manufacturing method
• CPC Class Codes: H01L 21/8258 the substrate being a semiconductor, using a combination of technologies covered by H01L21/8206, H01L21/8213 , H01L21/822, H01L21/8252, H01L21/8254 or H01L21/8256
• CPC Class Codes: H01S 5/026 Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers stabilisation of output H01S5/06
• CPC Class Codes: Y10T 428/31678 Of metal

Abstract

A method is provided for the integration of an optical gain material into a Complementary metal oxide semiconductor device, the method comprising the steps of: configuring a workpiece from a silicon wafer upon which is disposed an InP wafer bearing an epitaxy layer; mechanically removing the InP substrate; etching the InP remaining on epitaxy layer with hydrochloric acid; depositing at least one Oxide pad on revealed the epitaxy layer; using the Oxide pad as a mask during a first pattern etch removing the epitaxy to an N level; etching with a patterned inductively coupled plasma (ICP) technique; isolating the device on the substrate with additional pattern etching patterning contacts, applying the contacts.

Claims

1. A method for the integration of an optical gain material into a Complementary metal oxide semiconductor device, said method comprising the sequence of steps of:

Bonding an epitaxial layer grown on a InP substrate to a silicon wafer, thereby configuring a workpiece;

Mechanically removing a portion of said InP substrate;

Etching said InP remaining on epitaxial layer with hydrochloric acid;

Depositing at least one Oxide pad on revealed said epitaxial layer;

Using said Oxide pad as a mask during a first pattern etch removing the epitaxy to an N level;

Etching with a patterned inductively coupled plasma (ICP) technique;

Isolating the device on the substrate with additional pattern etching patterning contacts; and

Applying said contacts.