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Semiconductor memory device and method for manufacturing same

  • US 8,288,816 B2
  • Filed: 06/11/2010
  • Issued: 10/16/2012
  • Est. Priority Date: 03/05/2010
  • Status: Active Grant
First Claim
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1. A semiconductor memory device comprising:

  • a base having a substrate and a peripheral circuit formed on the substrate;

    a stacked body having a plurality of conductive layers and insulating layers stacked alternately above the base;

    a memory film including a charge storage film provided on an inner wall of a memory hole formed in a stacking direction of the stacked body;

    a channel body provided inside the memory film in the memory hole;

    a contact plug provided by piercing the stacked body;

    a global bit line provided between the peripheral circuit and the stacked body and connected to a lower end portion of the contact plug; and

    a plurality of local bit lines provided above the stacked body and divided in an extending direction of the plurality of local bit lines, the plurality of local bit lines connected to the channel body and commonly connected to the global bit line through the contact plug.

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