Multi-context graphics processing
First Claim
Patent Images
1. A method of multi-stage pipeline graphics processing, comprising:
- receiving a plurality of graphics processing tasks;
determining respective contexts for each task;
performing, by a computer, a first graphics processing operation for each of said contexts using a first portion of a graphics memory, wherein the first portion of graphics memory is shared by each said first graphics processing operation for each of said contexts; and
performing a second graphics processing operation on results of said performing a first graphics processing operation, wherein said performing a second graphics processing operation occurs using a different portion of said graphics memory for each context, and wherein each different portion of said graphics memory for each context is separate from the first portion of graphics memory.
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Abstract
A method of managing multiple contexts for a single mode display includes receiving a plurality of tasks from one or more applications and determining respective contexts for each task, each context having a range of memory addresses. The method also includes selecting one context for output to the single mode display and loading the selected context into a graphics processor for the display.
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Citations
21 Claims
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1. A method of multi-stage pipeline graphics processing, comprising:
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receiving a plurality of graphics processing tasks; determining respective contexts for each task; performing, by a computer, a first graphics processing operation for each of said contexts using a first portion of a graphics memory, wherein the first portion of graphics memory is shared by each said first graphics processing operation for each of said contexts; and performing a second graphics processing operation on results of said performing a first graphics processing operation, wherein said performing a second graphics processing operation occurs using a different portion of said graphics memory for each context, and wherein each different portion of said graphics memory for each context is separate from the first portion of graphics memory. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A non-transitory machine readable storage medium storing executable instructions which when executed by a processor cause the processor to perform operations for multi-stage pipeline graphics processing, the operations comprising:
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receiving a plurality of graphics processing tasks; determining respective contexts for each task, performing, by a computer, a first graphics processing operation for each of said contexts using a first portion of a graphics memory, wherein the first portion of graphics memory is shared by each said first graphics processing operation for each of said contexts; and performing a second graphics processing operation on results of said performing a first graphics processing operation, wherein said performing a second graphics processing operation occurs using a different portion of said graphics memory for each context, and wherein each different portion of said graphics memory for each context is separate from the first portion of graphics memory. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A data processing system comprising:
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means for receiving a plurality of graphics processing tasks; means for determining respective contexts for each task, means for performing, by a computer, a first graphics processing operation for each of said contexts using a first portion of a graphics memory, wherein the first portion of graphics memory is shared by each said first graphics processing operation for each of said contexts; and means for performing a second graphics processing operation on results of said performing a first graphics processing operation, wherein said performing a second graphics processing operation occurs using a different portion of said graphics memory for each context, and wherein each different portion of said graphics memory for each context is separate from the first portion of graphics memory. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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Specification