Multi-component compatible data architecture

• US 8,289,962 B2
• Filed: 01/21/2010
• Issued: 10/16/2012
• Est. Priority Date: 09/25/2006
• Status: Active Grant

• Current Assignee: Futurewei Technologies Incorporated (Huawei Investment & Holding Co., Ltd.)
• Original Assignee: Futurewei Technologies Incorporated (Huawei Investment & Holding Co., Ltd.)
• Inventors: Fourcand, Serge Francois
• Primary Examiner(s): Pham, Brenda H
• Application Number:
  US12/691,372
• Publication Number:
  US 20100135315A1
• Time in Patent Office: 999 Days
• Field of Search: 370/389, 370/358, 370/359, 370/386, 370/391, 370/395.5, 370/395.51, 370/401, 370/402, 370/411, 370/420
• US Class Current: 370/389
• CPC Class Codes: H04J 3/1611 Synchronous digital hierarchy [SDH] or SONET H04J3/1664 takes precedence for interactions with OTN

Abstract

A backbone network, comprising a first switch comprising a first port configured to communicate a data stream via an Ethernet interface, and a second port configured to communicate the data stream via a SONET/SDH interface, and a second switch comprising a third port configured to receive the data stream from the first switch via the Ethernet interface, wherein the first switch and the second switch are synchronized.

Claims

1. A network comprising:

a first line card configured to send a data stream via an Ethernet interface, wherein the data stream comprises an Ethernet packet data and a time division multiplexed (TDM) data;

a second line card configured to receive the data stream via the Ethernet interface;

a third line card configured to send the data stream via a SONET/SDH interface; and

a fourth line card configured to receive the data stream via the SONET/SDH interface,

wherein the first line card, the second line card, the third line card, and the fourth line card are synchronized to an absolute time.

2. The network of claim 1, wherein the second line card and the fourth line card are phase-aligned.

3. The network of claim 1, further comprising:

a fifth line card configured to receive the data stream from the second line card via the Ethernet interface and send the data stream via a second SONET/SDH interface;

a switch configured to receive the data stream from the fifth line card via the second SONET/SDH interface, process the data stream, and send the data stream via a third SONET/SDH interface; and

a sixth line card configured to receive the data stream from the switch via the third SONET/SDH interface and send the data stream via a second Ethernet interface,

wherein the fifth line card, the switch, and the sixth line card, are located between the first line card and the second line card.

4. The network of claim 3, further comprising:

a seventh line card configured to receive the data stream from the switch via a fourth SONET/SDH Ethernet interface; and

an eighth line card configured to receive the data stream from the seventh line card via fifth SONET/SDH interface,

wherein the seventh line card is located between the switch and the eighth line card,

wherein the eighth line card is synchronized to an absolute time, and

wherein the reception of the data stream at the second line card, the fourth line card, the sixth line card and the eighth line card are phase-aligned.

5. The network of claim 1, wherein the data stream further comprises high priority flow data and at least one idle bit subsequent to the high priority flow, wherein a quantity of idle bits is adjusted according to a size of a SONET/SDH payload.

6. The network of claim 1, wherein the Ethernet packet data comprises a best effort packet (BEP) data and a high performance flow (HPF) data.

7. The network of claim 6, wherein the first line card, the second line card, the third line card, and the fourth line card each comprise a data type multiplexer, wherein the data type multiplexer multiplexes the Ethernet packet data and the TDM data on a common data path.

8. The network of claim 7, wherein the data type multiplexer maps the location of the BEP data, the HPF data, and the TDM data using a timeslot map.

9. The network of claim 8, wherein the timeslot map is transmitted with the multiplexed data.

10. The network of claim 7, wherein the data type multiplexer is configured to perform clock domain adaptation.

11. A method comprising:

sending, by a first line card, a data stream via an Ethernet interface, wherein the data stream comprises an Ethernet packet data and a time division multiplexed data;

receiving, by a second line card, the data stream via the Ethernet interface;

sending, by a third line card, the data stream via a SONET/SDH interface; and

receiving, by a fourth line card, the data stream via the SONET/SDH interface,

synchronizing the first line card, the second line card, the third line card, and the fourth line card to an absolute time.

12. The method of claim 11, further comprising:

phase-aligning the second line card and the fourth line card.

13. The method of claim 11, further comprising:

receiving, by a fifth line card, the data stream from the second line card via the Ethernet interface;

sending, by the fifth line card, the data stream via a second SONET/SDH interface;

receiving, by a switch, the data stream from the fifth line card via the second SONET/SDH interface;

process, by the switch, the data stream;

sending the processed data stream via a third SONET/SDH interface; and

receiving, by a sixth line card, the data stream from the switch via the third SONET/SDH interface; and

sending the data stream via a second Ethernet interface,

wherein the fifth line card, the switch, and the sixth line card, are located between the first line card and the second line card.

14. The method of claim 13, further comprising:

receiving, by a seventh line card, the data stream from the switch via a fourth SONET/SDH Ethernet interface;

receiving, by an eighth line card, the data stream from the seventh line card via a fifth SONET/SDH interface;

synchronizing the eighth line card to an absolute time; and

phase-aligning the reception of the data stream at the second line card, the fourth line card, the sixth line card and the eighth line card,

wherein the seventh line card is located between the switch and the eighth line card.

15. The method of claim 11, further comprising:

adjusting a quantity of idle bits according to a size of a SONET/SDH payload,

wherein the data stream further comprises high priority flow data and at least one of the idle bits subsequent to the high priority flow.

16. The method of claim 11, wherein the Ethernet packet data comprises a best effort packet (BEP) data and a high performance flow (HPF) data.

17. The method of claim 16, further comprising multiplexing, by a data type multiplexer, the Ethernet packet data and the TDM data on a common data path,

wherein the first line card, the second line card, the third line card, and the fourth line card each comprise a data type multiplexer.

18. The method of claim 17, further comprising:

mapping, by the data type multiplexer, the location of the BEP data, the HPF data, and the TDM data using a timeslot map.

19. The method of claim 18, further comprising:

transmitting the timeslot map with the multiplexed data.

20. The method of claim 17, further comprising:

performing, by the data type multiplexer, clock domain adaptation.