Enhanced host interface

• US 8,291,151 B2
• Filed: 12/21/2005
• Issued: 10/16/2012
• Est. Priority Date: 08/03/2005
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Inventors: Sinclair, Alan Welsh
• Primary Examiner(s): Alsip, Michael
• Application Number:
  US11/316,578
• Publication Number:
  US 20070033327A1
• Time in Patent Office: 2,491 Days
• Field of Search: 711/103, 707/999.1, 710/11
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 16/1847 specifically adapted to static storage, e.g. adapted to flash memory or SSD
• CPC Class Codes: G06F 2212/7202 Allocation control and policies
• CPC Class Codes: G06F 2212/7205 Cleaning, compaction, garbage collection, erase control
• CPC Class Codes: G06F 3/0605 by facilitating the interaction with a user or administrator
• CPC Class Codes: G06F 3/0608 Saving storage space on storage systems
• CPC Class Codes: G06F 3/0613 in relation to throughput
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0643 Management of files
• CPC Class Codes: G06F 3/0644 Management of space entities, e.g. partitions, extents, pools
• CPC Class Codes: G06F 3/0652 Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/102 External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators

Abstract

A memory system that is compatible with hosts using different protocols includes protocol adapters for the different protocols. Protocol adapters allow a common backend system to be used for data that is provided in different formats. A protocol adapter generates responses to a host and generates commands for a backend as appropriate.

Claims

1. A memory system for storing data in a non-volatile memory array, the memory system receiving data from one or more applications in different logical formats and storing data in the memory array in a common logical format, comprising:

a first protocol adapter that receives first data from a first application as a first host file preceded by an indication of the length of the first host file and sends the first data to the non-volatile memory array where the first data are stored at a location recorded using a first file identifier;

a second protocol adapter that receives second data from a second application as a stream of data identified as data of a second host file without an indication of the length of the second host file and sends the second data to the non-volatile memory array where the second data are stored at a location recorded using a second file identifier; and

a third protocol adapter that receives third data from a third application as a plurality of sectors having individual logical addresses from a logical address range defined for the memory system and sends the third data to the non-volatile memory array where the third data are stored at a location recorded using a third file identifier.

2. The memory system of claim 1 wherein the memory system is contained in a memory card that may be removably connected to host systems by a standardized connection.

3. The memory system of claim 2 wherein the first application runs on a first host system, the memory card connected to the first host system at a first time;

the second application runs on a second host system, the memory card connected to the second host system at a second time; and

the third application runs on a third host system, the memory card connected to the third host system at a third time.

4. The memory system of claim 1 wherein the locations of the first, second and third data are recorded with entries indicating one or more blocks in the memory array corresponding to each of the first, second and third file identifiers.

5. The memory system of claim 1 wherein the first protocol adapter generates an indication to the host that the first host file has been received.

6. The memory system of claim 1 wherein the first protocol adapter generates an indicator of the end of the first host file that causes the first data to be scheduled for garbage collection.

7. The memory system of claim 1 wherein the non-volatile memory array consists of a plurality of blocks, a block being a minimum physical unit of erase of the memory array.

8. The memory system of claim 7 wherein the plurality of blocks are grouped into metablocks and all blocks of a metablock are erased together.

9. The memory system of claim 3 further comprising a physical interface, the physical interface connecting the memory system to the first host system at the first time, the physical interface connecting the memory system to the second host system at the second time, and the physical interface connecting the memory system to the third host system at the third time.

10. The memory system of claim 2 wherein the memory card includes a memory controller and the first, second, and third protocol adapters are executed by the memory controller.

11. A memory system comprising:

a nonvolatile memory array;

a backend memory management system that manages data within the nonvolatile memory array as files;

an interface layer that communicates with a host;

a translation layer between the interface layer and the backend memory management system, the translation layer receiving host commands from the interface layer, the host commands complying with an object protocol, and in response to receiving the host commands the translation layer generating translated commands to the backend memory management system, the translated commands not complying with the object protocol; and

the memory system embodied on a removable memory card that connects to a host interface and that stores data received through the host interface;

wherein a host sends metadata including an indication of the size of an object before sending the object and the translation layer determines when the entire object has been received from the host from the indication;

in response to determining that the entire object has been received, the translation layer generates a response that is sent to the host and generates an end of file indicator that is sent to the backend memory management system.

12. The memory system of claim 11 wherein the object protocol is Media Transport Protocol (MTP).

13. The memory system of claim 11 wherein the translation layer further includes:

a file protocol adapter that translates communication from a second host using a host file protocol to the backend file protocol; and

an LBA protocol adapter that translates communication from a third host using a logical address protocol to the backend file protocol.

14. The memory system of claim 13 wherein the LBA protocol adapter receives sectors of data having logical addresses allocated by the third host from a logical address space defined for the memory system and maps the sectors to virtual files that are equal in size to the capacity of a metablock of the memory array, where a metablock is a unit of erase that consists of an integer number of blocks that are erased together.

15. A memory system for storing data in a non-volatile memory array, the memory system receiving data from one or more applications in different logical formats and storing data in the memory array in a common logical format, comprising:

a first protocol adapter that receives first data from a first application as a first host file preceded by an indication of the length of the first host file and sends the first data to the non-volatile memory array, where the first data are stored at a location recorded using a first file identifier; and

a second protocol adapter that receives second data from a second application as a stream of data identified as data of a second host file without a preceding indication of the length of the second host file and sends the second data to the non-volatile memory array, where the second data are stored at a location recorded using a second file identifier.

16. The memory system of claim 15 wherein the memory system is contained in a memory card that may be removably connected to host systems by a standardized connection.

17. The memory system of claim 16 wherein the first application runs on a first host system, the memory card connected to the first host system at a first time;

and

the second application runs on a second host system, the memory card connected to the second host system at a second time.

18. The memory system of claim 15 wherein the locations of the first data and the second data are recorded with entries indicating one or more blocks in the memory array corresponding to each of the first and second file identifiers.

19. The memory system of claim 15 wherein the first protocol adapter generates an indication to the host that the first host file has been received.

20. The memory system of claim 15 wherein the first protocol adapter generates an indicator of the end of the first host file that causes the first data to be scheduled for garbage collection.