Multilayer pillar for reduced stress interconnect and method of making same

• US 8,293,587 B2
• Filed: 10/11/2007
• Issued: 10/23/2012
• Est. Priority Date: 10/11/2007
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Srivastava, Kamalesh K, Sundlof, Brian R, Jadhav, Virendra R, Semkow, Krystyna W
• Primary Examiner(s): Cao, Phat X
• Assistant Examiner(s): Doan, Nga
• Application Number:
  US11/870,583
• Publication Number:
  US 20090095502A1
• Time in Patent Office: 1,839 Days
• Field of Search: 438/121, 438/778, 257/737, 257/738
• US Class Current: 438/121
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05099 Material
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/05666 Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/1145 Physical vapour deposition [PVD], e.g. evaporation, or sputtering
• CPC Class Codes: H01L 2224/11452 Chemical vapour deposition [CVD], e.g. laser CVD
• CPC Class Codes: H01L 2224/11462 Electroplating
• CPC Class Codes: H01L 2224/11901 with repetition of the same manufacturing step
• CPC Class Codes: H01L 2224/13005 Structure
• CPC Class Codes: H01L 2224/13013 being rectangular or square
• CPC Class Codes: H01L 2224/13023 the whole bump connector protruding from the surface
• CPC Class Codes: H01L 2224/1308 being stacked
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/13109 Indium [In] as principal constituent
• CPC Class Codes: H01L 2224/13111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/13113 Bismuth [Bi] as principal constituent
• CPC Class Codes: H01L 2224/13124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/13139 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/13144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/13147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/13155 : Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/13166 : Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/13171 : Chromium [Cr] as principal constituent
• CPC Class Codes: H01L 2224/13184 : Tungsten [W] as principal constituent
• CPC Class Codes: H01L 2224/13599 : Material
• CPC Class Codes: H01L 2224/13655 : Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/13666 : Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/13671 : Chromium [Cr] as principal constituent
• CPC Class Codes: H01L 2224/13684 : Tungsten [W] as principal constituent
• CPC Class Codes: H01L 2224/16235 : the bump connector connecting to a via metallisation of the item
• CPC Class Codes: H01L 2224/29099 : Material
• CPC Class Codes: H01L 2224/29599 : Material
• CPC Class Codes: H01L 2224/81815 : Reflow soldering
• CPC Class Codes: H01L 23/562 : Protection against mechanical damage H01L23/02, H01L23/28 take precedence
• CPC Class Codes: H01L 24/11 : Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 2924/00013 : Fully indexed content
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/2064 : larger or equal to 1 micron less than 100 microns
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H01L 2924/35121 : Peeling or delaminating
• CPC Class Codes: H01L 2924/37001 : Yield
• CPC Class Codes: H01L 2924/384 : Bump effects
• CPC Class Codes: Y10T 156/10 : Methods of surface bonding and/or assembly therefor

Abstract

A multi-layer pillar and method of fabricating the same is provided. The multi-layer pillar is used as an interconnect between a chip and substrate. The pillar has at least one low strength, high ductility deformation region configured to absorb force imposed during chip assembly and thermal excursions.

Claims

1. A method of forming a copper interconnect pillar, the method comprising:

forming a first copper layer;

forming a first nickel barrier protective layer in direct contact on the first copper layer;

forming a substantially planar first intermediate layer in direct contact with the first nickel barrier protective layer on the first copper layer, the first intermediate layer having a modulus of elasticity lower than the first copper layer, and the first intermediate layer being a single material comprising one of tin, bismuth and indium;

forming a second nickel barrier protective layer in direct contact with the first intermediate layer, on a surface opposing the first nickel barrier protective layer;

forming a second copper layer in direct contact with the second nickel barrier protective layer on an opposing side thereof to the first intermediate layer, the first intermediate layer having a modulus of elasticity lower than the second copper layer; and

bonding a chip to the first copper layer and a substrate to the second copper layer.

2. The method of claim 1, further comprising:

forming a second intermediate layer with nickel barrier protective layers on opposing surfaces thereof and directly on the second copper layer; and

forming a third copper layer on the second intermediate layer with the nickel barrier protective layers, each of the first and second intermediate layers having a modulus of elasticity lower than each of the first, second, and third copper layers.

3. The method of claim 1, wherein the thickness of the first intermediate layer is about 0.2 to 2 microns.

4. The method of claim 1, wherein the first nickel barrier protective layer is at an interface between the first copper layer and the first intermediate layer, and the second nickel barrier protective layer is at an interface between the first intermediate layer and the second copper layer.

5. The method of claim 4, wherein the overall height of the pillar resulting from the method is more than its width.

6. The method of claim 2, wherein one of the nickel barrier protective layers is in direct contact with the second copper layer, and another of the nickel barrier protective layers is in direct contact with the third copper layer.

7. The method of claim 6, wherein the second intermediate layer is a single material comprising one of tin, bismuth and indium.

8. A method of bonding a chip to a substrate utilizing at least one multi-layer copper interconnect pillar, comprising:

providing a chip having a barrier and adhesion layer;

forming a seed layer on the barrier and adhesion layer, the seed layer comprising one of chromium copper and copper;

forming a first copper layer on the barrier and adhesion layer;

forming a substantially planar first intermediate layer directly on the first copper layer, the first intermediate layer having a modulus of elasticity lower than the first copper layer;

forming a second copper layer directly on the first intermediate layer, the first intermediate layer having a modulus of elasticity lower than the second copper layer; and

bonding the resulting structure to a substrate,

wherein the first intermediate layer is a single material comprising one of tin, bismuth and indium.

9. The method of claim 8, further comprising forming a cap layer on the second copper layer before bonding to the substrate, the cap layer having properties to bond the interconnect pillar to the substrate.

10. The method of claim 9, wherein the cap layer is solder.

11. The method of claim 8, wherein the thickness of the first intermediate layer is about 5 to 20 microns.

12. The method of claim 8, wherein the thickness of the first intermediate layer is about 0.2 to 2 microns.

13. The method of claim 8, further comprising:

forming a first barrier protective layer at an interface between the first copper layer and the first intermediate layer; and

forming a second barrier protective layer at an interface between the first intermediate layer and the second copper layer.

14. The method of claim 13, wherein each of the first and second barrier protective layers is nickel.

15. The method of claim 14, wherein the overall height of the pillar resulting from the method is more than its width.

16. A method of bonding a chip to a substrate utilizing at least one multi-layer copper interconnect pillar, comprising:

providing a chip having a barrier and adhesion layer;

forming a seed layer on the barrier and adhesion layer, the seed layer comprising one of chromium copper and copper;

forming a first copper layer on the barrier and adhesion layer;

forming a substantially planar first intermediate layer directly on the first copper layer, the first intermediate layer having a modulus of elasticity lower than the first copper layer;

forming a second copper layer directly on the first intermediate layer, the first intermediate layer having a modulus of elasticity lower than the second copper layer;

forming a second intermediate layer with nickel barrier protective layers on opposing surfaces thereof and directly on the second copper layer;

forming a third copper layer on the second intermediate layer with the nickel barrier protective layers, each of the first and second intermediate layers having a modulus of elasticity lower than each of the first, second, and third copper layers; and

bonding the resulting structure to a substrate.

17. The method of claim 16, wherein one of the nickel barrier protective layers is in direct contact with the second copper layer, and another of the nickel barrier protective layers is in direct contact with the third copper layer.

18. The method of claim 17, wherein the second intermediate layer is a single material comprising one of tin, bismuth and indium.

19. A method of forming a copper interconnect pillar, the method comprising:

forming a first copper layer;

forming a first nickel barrier protective layer in direct contact on the first copper layer;

forming a substantially planar first intermediate layer in direct contact with the first nickel barrier protective layer on the first copper layer, the first intermediate layer having a modulus of elasticity lower than the first copper layer, and the first intermediate layer being a single material comprising one of tin, bismuth and indium;

forming a second nickel barrier protective layer in direct contact with the first intermediate layer, on a surface opposing the first nickel barrier protective layer;

forming a second copper layer in direct contact with the second nickel barrier protective layer on an opposing side thereof to the first intermediate layer, the first intermediate layer having a modulus of elasticity lower than the second copper layer;

forming a seed layer comprising one of chromium copper and copper; and

forming the first copper layer in direct contact on the seed layer.