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Systems and methods for testing a peripheral interfacing with a processor according to a high-speed serial interface protocol

  • US 8,294,482 B2
  • Filed: 09/16/2008
  • Issued: 10/23/2012
  • Est. Priority Date: 03/14/2008
  • Status: Active Grant
First Claim
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1. A system for testing a peripheral, comprising:

  • a test computer; and

    a test module comprising;

    a test processor electrically coupled to a test computer interface and a peripheral interface, the test processor operative to communicate with the peripheral according to a high-speed serial interface protocol, and the test processor responsive to commands provided by the test computer;

    wherein the test module further comprises;

    a dock electrically coupled to the test processor; and

    memory for storing firmware, the memory electrically coupled to the test processor.

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