Inter-packet gap network clock synchronization

• US 8,295,310 B2
• Filed: 04/16/2007
• Issued: 10/23/2012
• Est. Priority Date: 09/25/2006
• Status: Active Grant

• Current Assignee: Futurewei Technologies Incorporated (Huawei Investment & Holding Co., Ltd.)
• Original Assignee: Futurewei Technologies Incorporated (Huawei Investment & Holding Co., Ltd.)
• Inventors: Fourcand, Serge Francois
• Primary Examiner(s): HOANG, THAI D
• Application Number:
  US11/735,590
• Publication Number:
  US 20080075128A1
• Time in Patent Office: 2,017 Days
• Field of Search: 370503-520
• US Class Current: 370/504
• CPC Class Codes: H04J 3/0602 Systems characterised by the synchronising information used
• CPC Class Codes: H04J 3/065 using timestamps
• CPC Class Codes: H04J 3/0667 Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays arrangements for monitoring round trip delays in packet switching networks H04L43/0864
• CPC Class Codes: H04L 12/403 with centralised control, e.g. polling

Abstract

A network component comprising at least one processor configured to implement a method comprising adding a clock synchronization data to a data stream comprising a plurality of Ethernet packets, wherein the clock synchronization data is located in a gap between two of the Ethernet packets. Also disclosed is a method comprising adding a clock synchronization data to a gap between a plurality of Ethernet packets in a data stream, wherein the clock synchronization data comprises a timestamp, a first bit that indicates whether the clock synchronization data is a request or an acknowledgement, and a second bit that indicates a requested operational mode.

Claims

1. A network component comprising:

at least one processor configured to;

add a clock synchronization data to a data stream comprising a plurality of Ethernet packets,

wherein the clock synchronization data is located in a gap between two of the Ethernet packets, and

wherein the clock synchronization data is not located in every gap between the Ethernet packets.

2. The component of claim 1, wherein the clock synchronization data does not modify the Ethernet packets.

3. The component of claim 1, wherein the clock synchronization data is added to the data stream at least once about every 125 microseconds.

4. The component of claim 1, wherein the clock synchronization data replaces about two sets of idle characters.

5. The component of claim 1, wherein a first idle character occurs before the clock synchronization and a second idle character occurs after the clock synchronization data.

6. A method comprising:

adding a clock synchronization data to a gap between a plurality of Ethernet packets in a data stream, wherein the clock synchronization data comprises;

a timestamp;

a first bit that indicates whether the clock synchronization data is a request or an acknowledgement; and

a second bit that indicates a requested operational mode,

wherein the clock synchronization data is about four octets long, the first bit is located at about a sixth bit in a fourth octet, and the second bit is located at about a seventh bit in the fourth octet.

7. The method of claim 6, wherein the clock synchronization data has a resolution of about 0.01 nanoseconds, and wherein the clock synchronization data has a period of no more than about 125 microseconds.

8. The method of claim 6, wherein a first idle character occurs before the clock synchronization data and a second idle character occurs after the clock synchronization data.

9. The method of claim 6, wherein the clock synchronization data indicates a quality of a clock.

10. The method of claim 6, wherein the clock synchronization data replaces about two sets of idle characters.

11. The method of claim 6, wherein the clock synchronization data does not affect the bandwidth of the data stream.

12. The method of claim 6, wherein the clock synchronization data is added to the data stream at least once about every 125 microseconds, and wherein the clock synchronization data is not located in every gap between the Ethernet packets.