Method and apparatus for detecting the type of interface to which a peripheral device is connected

• US 8,296,474 B2
• Filed: 12/29/2011
• Issued: 10/23/2012
• Est. Priority Date: 07/08/1998
• Status: Expired due to Fees

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Corporation
• Inventors: Hanson, Mark T., Sherman, Nathan C., Featherston, Lord Nigel, Casebolt, Mark W., Drake, Victor P., Mullins, Keith, Holo, David L., Lipscomb, Terry M.
• Primary Examiner(s): Tsai, Henry
• Assistant Examiner(s): Hassan, Aurangzeb
• Application Number:
  US13/339,950
• Publication Number:
  US 20120124247A1
• Time in Patent Office: 299 Days
• Field of Search: 710/1, 710/8, 710/15, 710/16, 710/104, 713/100
• US Class Current: 710/16
• CPC Class Codes: G06F 13/4068 Electrical coupling
• CPC Class Codes: G06F 13/4086 Bus impedance matching, e.g. termination

Abstract

A peripheral device is connectable to a computer having one of a first interface and a second interface. The first interface communicates with the peripheral device over a differential data connection having a first data conductor and a second data conductor. The second interface communicates with the peripheral device over a clock conductor and a single ended data connection which includes a data conductor. The peripheral device has first and second communication conductors. The peripheral device includes an interface detection component coupled to the first and second communication conductors and configured to detect which of the first and second interfaces the peripheral device is connected to.

Claims

1. A peripheral device connectable to a computer having one of a first interface and a second interface, the first interface communicating with the peripheral device over a differential data connection including a first data conductor and a second data conductor, and the second interface communicating with the peripheral device over a single ended data connection, including a first data conductor, and a clock conductor, the peripheral device comprising:

first and second communication conductors connected to the first and second data conductors in the differential data connection when the computer includes the first interface, and connected to the first data conductor in the single ended data connection and the clock conductor when the computer includes the second interface;

an interface detection component, coupled to the first and second communication conductors, monitoring the first and second communication conductors to detect which of the first and second interfaces the peripheral device is connected to and to providing a connection output indicative of the detected interface; and

a controller component, coupled to the interface detection component, communicating between the peripheral device and the computer over the first and second communication conductors according to a protocol corresponding to the detected interface based on the connection output.

2. The peripheral device of claim 1 wherein, when the computer includes the first interface, the first and second data conductors in the differential data connection in the computer are coupled to a first voltage potential with first and second resistive elements, respectively, and when the computer includes the second interface, the first data conductor in the single ended data connection and the clock conductor in the computer are pulled to a second voltage potential by third and fourth resistive elements, respectively, and wherein the interface detection component comprises:

a signal detector coupled to the first and second communication conductors and detecting signal levels on the first and second communication conductors and providing the connection output based on the signal levels detected.

3. The peripheral device of claim 2 wherein the interface detection component comprises:

a fifth resistive element;

a sixth resistive element;

a first selectable connection element selectively connecting the first communication conductor to a third voltage potential through the fifth resistive element; and

a second selectable connection element selectively connecting the second communication conductor to the third voltage potential through the sixth resistive element.

4. The peripheral device of claim 3 wherein the second and third voltage potentials are associated with a first logic level.

5. The peripheral device of claim 4 further comprising the interface connection component deselecting the first and second selectable connection elements to disconnect the first and second communication conductors from the third voltage potential upon power-up of the peripheral device.

6. The peripheral device of claim 5 further comprising the signal detector detecting signal levels on the first and second communication conductors upon power-up of the peripheral device, when the first and second selectable connection elements are deselected and providing the connection output based on the signal levels.

7. The peripheral device of claim 6 further comprising the signal detector providing the connection output indicative of connection to the second interface when the signal level corresponding to at least one of the first and second communication conductors is at the first logic level.

8. The peripheral device of claim 7 further comprising the interface detection component selecting the first selectable connection element and deselecting the second connection element and the signal detector providing the connection output indicative of connection to the second interface when the signal level corresponding to the first communication conductor is at a second logic level corresponding to the first voltage potential.

9. The peripheral device of claim 8 further comprising the signal detector providing the connection output indicative of connection to the first interface when the signal level corresponding to the first communication conductor is at the first logic level.

10. The peripheral device of claim 8 further comprising the interface detection component deselecting the first selectable connection element and deselecting the second connection element and the signal detector providing the connection output indicative of connection to the first interface when the signal level corresponding to the first communication conductor is at the second logic level and providing the connection output indicative of connection to the second interface when the signal level corresponding to at least one of the first and second communication conductors is at the first logic level.

11. The peripheral device of claim 10 wherein the first logic level corresponds to a logic one and wherein the second logic level corresponds to a logic zero.