High mobility monolithic p-i-n diodes

• US 8,298,887 B2
• Filed: 06/25/2010
• Issued: 10/30/2012
• Est. Priority Date: 12/03/2009
• Status: Expired due to Fees

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Han, Xinhai, Rajagopalan, Nagarajan, Park, Ji Ae, Mebarki, Bencherki, Park, Heung Lak, Kim, Bok Hoen
• Primary Examiner(s): Garber, Charles
• Assistant Examiner(s): STEVENSON, ANDRE C
• Application Number:
  US12/824,032
• Publication Number:
  US 20110136327A1
• Time in Patent Office: 858 Days
• Field of Search: 438/237
• US Class Current: 438/237
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02573 Conductivity type
• CPC Class Codes: H01L 21/02576 N-type
• CPC Class Codes: H01L 21/02579 P-type
• CPC Class Codes: H01L 21/02603 Nanowires
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 29/66136 PN junction diodes
• CPC Class Codes: H01L 29/868 PIN diodes

Abstract

Methods of forming high-current density vertical p-i-n diodes on a substrate are described. The methods include the steps of concurrently combining a group-IV-element-containing precursor with a sequential exposure to an n-type dopant precursor and a p-type dopant precursor in either order. An intrinsic layer is deposited between the n-type and p-type layers by reducing or eliminating the flow of the dopant precursors while flowing the group-IV-element-containing precursor. The substrate may reside in the same processing chamber during the deposition of each of the n-type layer, intrinsic layer and p-type layer and the substrate is not exposed to atmosphere between the depositions of adjacent layers.

Claims

1. A method of forming a high-current density vertical p-i-n diode on a substrate in a substrate processing region in a substrate processing chamber, the method comprising:

transferring the substrate into the substrate processing region;

flowing a group-IV-element-containing precursor having a group-IV flow rate while also flowing hydrogen with a hydrogen flow rate into the substrate processing region to form a polycrystalline semiconducting film on the substrate;

forming an RF plasma in the substrate processing region;

doping the semiconducting film during formation to form a vertical p-i-n film stack by sequentially

(1) supplying a first dopant-containing precursor at a first dopant flow rate during formation of a first doped layer,

(2) supplying essentially no flow rate of dopant-containing precursor during formation of an intrinsic layer,

(3) supplying a second dopant-containing precursor at a second dopant flow rate during formation of a second doped layer,

wherein formation of the first doped layer, the intrinsic layer and the second doped layer occur without exposing the substrate to atmosphere between formation of adjacent layers whereby oxygen incorporation near the interface is reduced and electronic mobility is improved, and wherein one of the first doped layer and the second doped layer is an n-type layer and the other is a p-type layer; and

removing the substrate from the substrate processing region.

2. The method of claim 1, wherein the first dopant-containing precursor comprises a precursor selected from the group consisting of BH₃, B₂H₆, higher order boranes, halogen-substituted boranes, TEB, TMB, TEG and TMG;

and the second dopant-containing precursor comprises a precursor selected from the group consisting of PH₃, halogen-substituted phosphines, AsH₃, halogen-substituted arsines, SbH₃, halogen-substituted stibines, TESb and TMSb.

3. The method of claim 1, wherein the second dopant-containing precursor comprises a precursor selected from the group consisting of BH₃, B₂H₆, higher order boranes, halogen-substituted boranes, TEB, TMB, TEG and TMG;

and the first dopant-containing precursor comprises a precursor selected from the group consisting of PH₃, halogen-substituted phosphines, AsH₃, halogen-substituted arsines, SbH₃, halogen-substituted stibines, TESb and TMSb.

4. The method of claim 1, wherein the first doped layer, the intrinsic layer and the second doped layer consist essentially of silicon and germanium.

5. The method of claim 4, wherein the first doped layer, the intrinsic layer and the second doped layer consist essentially of germanium.

6. The method of claim 1, wherein the mobility of the p-i-n diode is greater than or about one of 20 cm²/V-sec, 50 cm²/V-sec, 100 cm²/V-sec or 200 cm²/V-sec.

7. The method of claim 1, further comprising the operation of patterning the first doped layer, the intrinsic layer and the second doped layer to form a columnar p-i-n structure having a column width.

8. The method of claim 7, wherein the column width is less than or about 30 nm.

9. The method of claim 8, wherein the columnar p-i-n structure can tolerate 1 μ

Amp of current.

10. The method of claim 1, wherein the first doped layer is n-type and the second doped layer is p-type.

11. The method of claim 1, wherein the first doped layer is p-type and the second doped layer is n-type.

12. The method of claim 1, wherein the n-type layer comprises a dopant selected from the group consisting of phosphorus (P), arsenic (As) and antimony (Sb) .

13. The method of claim 1, wherein the p-type layer comprises a dopant selected from the group consisting of boron (B) and gallium (Sb) .

14. The method of claim 1, wherein the operation of supplying essentially no flow rate of dopant-containing precursor results in the intrinsic layer having a dopant density less than or about one of 10¹⁶/cm³, 10¹⁷/cm³ or 10¹⁸/cm³.

15. The method of claim 1, wherein the group-IV-element-containing precursor comprises a precursor selected from the group consisting of GeH₄, Ge₂H₆, higher order germanes and halogen-substituted germanes.

16. The method of claim 1, wherein the group-IV-element-containing precursor comprises a precursor selected from the group consisting of SiH₄, Si₂H₆, higher order silanes and halogen-substituted silanes.

17. The method of claim 1, further comprising the operation of flowing helium with a helium flow rate during formation of the p-i-n diode.

18. The method of claim 1, wherein the flow of the group-IV-element-containing precursor is interrupted between the first doped layer and the intrinsic layer or between the intrinsic layer and the second doped layer, but the vacuum is not broken so the substrate is not exposed to the atmosphere.