Semiconductor device

• US 8,299,522 B2
• Filed: 03/16/2011
• Issued: 10/30/2012
• Est. Priority Date: 09/28/2007
• Status: Active Grant

• Current Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Original Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Inventors: Iwamuro, Noriyuki
• Primary Examiner(s): Landau, Matthew
• Assistant Examiner(s): Crawford, Latanya N
• Application Number:
  US13/049,463
• Publication Number:
  US 20110163372A1
• Time in Patent Office: 594 Days
• Field of Search: 257/328, 257/330, 257/511, 257/373, 257/374, 257/343, 257/270, 257/329, 257/401, 257/E29.201, 257/E29.26, 257/E29.04, 257/E29.257, 257/E27.031, 257/E27.032, 257/E27.033
• US Class Current: 257/328
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7804 the other device being a pn-junction diode
• CPC Class Codes: H01L 29/7805 in antiparallel, e.g. freewheel diode
• CPC Class Codes: H01L 29/7808 the other device being a breakdown diode, e.g. Zener diode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A super-junction semiconductor substrate is configured in such a manner that an n-type semiconductor layer of a parallel pn structure is opposed to a boundary region between an active area and a peripheral breakdown-resistant structure area. A high-concentration region is formed at the center between p-type semiconductor layers that are located on both sides of the above n-type semiconductor layer. A region where a source electrode is in contact with a channel layer is formed over the n-type semiconductor layer. A portion where the high-concentration region is in contact with the channel layer functions as a diode. The breakdown voltage of the diode is set lower than that of the device.

Claims

1. A semiconductor device comprising:

a high-impurity-concentration semiconductor substrate of a first conductivity type;

a parallel pn structure formed on the semiconductor substrate and in which regions of the first conductivity type and regions of a second conductivity type are arranged alternately and joined to each other;

a channel region of the second conductivity type formed on part of a surface of the parallel pn structure;

source regions of the first conductivity type which occupy surface portions of the channel region;

trenches which are adjacent to the source regions and penetrate through the channel region so as to reach the parallel pn structure;

gate electrodes formed on surfaces of the trenches with gate oxide films interposed in between;

an insulating layer formed on surfaces of the gate electrodes;

a source electrode formed on part of a surface of the insulating layer and is in contact with surfaces of the channel region and the source regions;

a drain electrode formed on part of the surface of the insulating layer and a surface of the regions of the first conductivity type of the parallel pn structure; and

a diode formed on part of the surface of the insulating film in such a manner that it is in contact with the source electrode and the drain electrode and that its anode is located on the side of the source electrode and its cathode is located on the side of the drain electrode, and which is low in breakdown voltage than an active area.

2. The semiconductor device according to claim 1, wherein the parallel pn structure is striped by the regions of the first conductivity type and the regions of the second conductivity type.

3. A semiconductor device comprising:

a high-impurity-concentration semiconductor substrate of a first conductivity type;

a parallel pn structure formed on the semiconductor substrate and in which regions of the first conductivity type and regions of a second conductivity type are arranged alternately and joined to each other;

a channel region of the second conductivity type formed on part of a surface of the parallel pn structure;

a source region of the first conductivity type which occupies a surface portion of the channel region;

a gate electrode formed on a surface of the parallel pn structure with a gate oxide film interposed in between so as to be in contact with the source region and the channel region;

an insulating layer formed on a surface of the gate electrode;

a source electrode formed on part of a surface of the insulating layer and is in contact with surfaces of the channel region and the source region;

a drain electrode formed on part of the surface of the insulating layer and a surface of the regions of the first conductivity type of the parallel pn structure; and

a diode formed on part of the surface of the insulating film in such a manner that it is in contact with the source electrode and the drain electrode and that its anode is located on the side of the source electrode and its cathode is located on the side of the drain electrode, and which is low in breakdown voltage than an active area.

4. The semiconductor device according to claim 3, wherein the parallel pn structure is striped by the regions of the first conductivity type and the regions of the second conductivity type.