Fusion quad flat semiconductor package
First Claim
Patent Images
1. A semiconductor package comprising:
- a die paddle;
a plurality of first leads which each include first and second downsets formed therein in spaced relation to each other;
a plurality of second leads, at least some of which include a downset formed therein;
a semiconductor die attached to the die paddle and electrically connected to at least one of each of the first and second leads; and
a package body defining a bottom surface and a side surface, the package body at least partially encapsulating the first and second leads and the semiconductor die such that the first and second downsets of the first leads and the downsets of the second leads are covered by the package body, at least portions of the die paddle and the first leads are exposed in the bottom surface of the package body, and portions of the second leads protrude from the side surface of the package body.
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Abstract
A semiconductor package which includes a generally planar die paddle defining multiple peripheral edge segments and a plurality of leads which are segregated into at least two concentric rows. Connected to the top surface of the die paddle is at least one semiconductor die which is electrically connected to at least some of the leads of each row. At least portions of the die paddle, the leads, and the semiconductor die are encapsulated by a package body, the bottom surfaces of the die paddle and the leads of at least one row thereof being exposed in a common exterior surface of the package body.
360 Citations
20 Claims
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1. A semiconductor package comprising:
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a die paddle; a plurality of first leads which each include first and second downsets formed therein in spaced relation to each other; a plurality of second leads, at least some of which include a downset formed therein; a semiconductor die attached to the die paddle and electrically connected to at least one of each of the first and second leads; and a package body defining a bottom surface and a side surface, the package body at least partially encapsulating the first and second leads and the semiconductor die such that the first and second downsets of the first leads and the downsets of the second leads are covered by the package body, at least portions of the die paddle and the first leads are exposed in the bottom surface of the package body, and portions of the second leads protrude from the side surface of the package body. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A semiconductor package comprising:
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a die paddle; a plurality of first leads; a plurality of second leads which each include first and second downsets formed therein in spaced relation to each other; a plurality of third leads, at least some of which include a downset formed therein; a semiconductor die attached to the die paddle and electrically connected to at least one of each of the first, second and third leads; and a package body defining a bottom surface and a side surface, the package body at least partially encapsulating the first, second and third leads and the semiconductor die such that the first and second downsets of the second leads and the downsets of the third leads are covered by the package body, at least portions of the die paddle and the first and second leads are exposed in the bottom surface of the package body, and portions of the third leads protrude from the side surface of the package body. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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19. A semiconductor package comprising:
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a die paddle; a plurality of first leads extending along and in electrical isolation from the die paddle, each of the first leads defining a terminal, with the die paddle and at least portions of the first leads residing on a common first plane; a plurality of second leads extending along and in electrical isolation from the die paddle, at least portions of the second leads residing on a second plane which extends in spaced, generally parallel relation to the first plane; a semiconductor die attached to the die paddle and electrically connected to at least one of each of the first and second leads; and a package body defining a bottom surface and a side surface, the package body at least partially encapsulating the first and second leads and the semiconductor die such that at least portions of the die paddle and the terminals of the first leads are exposed in the bottom surface of the package body, and portions of the second leads protrude from the side surface of the package body. - View Dependent Claims (20)
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Specification