Integrated circuit for driving high-voltage LED lamp

• US 8,305,005 B2
• Filed: 09/08/2010
• Issued: 11/06/2012
• Est. Priority Date: 09/08/2010
• Status: Active Grant

• Current Assignee: Silergy Technology (Silergy Corporation)
• Original Assignee: Integrated Crystal Technology, Inc. (Silergy Corporation)
• Inventors: Fu, Wei-Chen, Liang, Wei-Chen, Li, Wen-Cen, Hou, Bo-Wen, Lo, Ching-Sung
• Primary Examiner(s): Vo, Tuyet Thi
• Application Number:
  US12/877,157
• Publication Number:
  US 20120056559A1
• Time in Patent Office: 790 Days
• Field of Search: 315/247, 315/291, 315/224, 315/225, 315307-326
• US Class Current: 315/247
• CPC Class Codes: H05B 45/355 Power factor correction [PFC]; Reactive power compensation
• CPC Class Codes: H05B 45/39 Circuits containing inverter bridges
• CPC Class Codes: H05B 45/48 having LEDs organised in strings and incorporating parallel shunting devices

Abstract

An integrated circuit for driving high-voltage LED lamps is applied to a rectified alternative current (AC) power and a plurality of LED stacks. The integrated circuit includes a control unit, a plurality of current-clamping units which electrically connect to the control unit and the LED stacks respectively, and a plurality of current-sensing units which electrically connect to the current-clamping units and the control unit. When the rectified power is switched on, the current-sensing unit constantly monitors the electrical current flowing through the respective current-clamping unit and feeds back the monitored data to the control unit. The control unit sequentially switches on or off the current-clamping units according to the combinatorial logic state of the monitored data.

Claims

1. An integrated circuit for driving high-voltage LED lamps applied with a full-wave rectified power, the integrated circuit comprising:

a plurality of LED stacks connected in series, each of the LED stacks including a first side and a second side, the second side of an LED stack being electrically connected to the first side of a next LED stack in the series;

a control unit;

a plurality of current-clamping units electrically connected to the control unit and LED stacks; and

at least one current-sensing unit electrically connected to the current-clamping units and the control unit;

wherein a first current-clamping units is electrically connected to the second side of the first LED stack and the first side of the second LED stack, and a last current-clamping unit is electrically connected to the second side of a last LED stack,

when an electrical current flowing through the current-clamping unit is greater than a default current, a respective current-sensing unit outputs a logical high signal to the control unit, and when the electrical current flowing through the current-clamping unit is not greater than the default current, the respective current-sensing unit outputs a logical low signal to the control unit, and

wherein the control unit is configured to turn off the first (N-1) current-clamping units when the control unit is informed from the logical high and low signals that the full-wave rectified power is larger enough to drive the first N LED stacks in the LED stack series, wherein N is an integer number larger than 1.

2. An integrated circuit for driving high-voltage LED lamp according to claim 1 wherein the current-clamping unit comprises:

an N-channel MOS; and

a feedback resistor electrically connected to a source of the N-channel MOS.

3. An integrated circuit for driving high-voltage LED lamp according to claim 1 wherein the current-sensing unit comprises an NPN transistor.

4. An integrated circuit for driving high-voltage LED lamps, comprising:

a control unit;

a plurality of current-clamping units electrically connected to the control unit and LED stacks; and

at least one current-sensing unit electrically connected to the current-clamping units and the control unit;

wherein the current-sensing unit monitors an electrical current flowing through the respective current-clamping unit and feeds back the monitored data to the control unit, and the control unit sequentially switches on or off the current-clamping units according to the combinatorial logic state of the monitored data,

wherein the current-sensing unit comprises an NPN transistor, and

wherein the current-sensing unit further comprises an inverter, and an input terminal of the inverter is electrically connected to the collector of an NPN transistor.

5. An integrated circuit for driving high-voltage LED lamps according to claim 4 wherein the current-sensing unit further comprises a buffer, and the input terminal of the buffer is electrically connected to the output terminal of the inverter.

6. An integrated circuit for driving high-voltage LED lamps according to claim 5 wherein the current-sensing unit further comprises a pull resistor electrically connected to the collector of the NPN transistor.

7. An integrated circuit for driving high-voltage LED lamps according to claim 6 wherein the current-sensing unit further comprises a base resistor electrically connected to the base of the NPN transistor.

8. An integrated circuit for driving high-voltage LED lamps, comprising:

a control unit;

a plurality of current-clamping units electrically connected to the control unit and LED stacks; and

at least one current-sensing unit electrically connected to the current-clamping units and the control unit;

wherein the current-sensing unit monitors an electrical current flowing through the respective current-clamping unit and feeds back the monitored data to the control unit, and the control unit sequentially switches on or off the current-clamping units according to the combinatorial logic state of the monitored data, and

wherein the control unit comprises;

at least one first NOT gate; and

at least one second NOT gate, and an input terminal of the second NOT gate electrically connected to the output terminal of the first NOT gate.

9. An integrated circuit for driving high-voltage LED lamps according to claim 8, wherein the control unit further comprises:

at least one OR gate, and the input terminal of the OR gate electrically connected to the input terminal of the first NOT gate.