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Thin film transistor array panel having improved storage capacitance and manufacturing method thereof

  • US 8,305,507 B2
  • Filed: 02/17/2006
  • Issued: 11/06/2012
  • Est. Priority Date: 02/25/2005
  • Status: Active Grant
First Claim
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1. A thin film transistor array panel, comprising:

  • a gate line;

    a data line intersecting the gate line;

    a storage electrode apart from the gate line and the data line;

    a semiconductor disposed under the storage electrode and contacting the storage electrode;

    a thin film transistor connected to the gate line and the data line and having a drain electrode formed of the same layer as the storage electrode;

    a pixel electrode connected to the drain electrode and electrically separated from the storage electrode;

    a first insulating layer over the storage electrode and the drain electrode and disposed under the pixel electrode;

    a second insulating layer disposed on the first insulating layer, and having an opening exposing the first insulating layer on the storage electrode,a shielding electrode disposed in the same layer as the pixel electrode and transmitting a common voltage, the shielding electrode contacting the storage electrode,wherein the shielding electrode comprises a first portion extending along the data line and covering the data line.

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