Short-circuit evaluation of Boolean expression by rolling up sub-expression result in registers storing default value
First Claim
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1. A processor, comprising:
- a Boolean logic unit, wherein the Boolean logic unit is configured to perform a short-circuit evaluation of a Normal Form Boolean expression/operation, wherein performing a short-circuit evaluation comprises halting the evaluation of at least a portion of the Normal Form Boolean expression/operation if the outcome of the portion becomes known based on an outcome of an evaluation of a prior portion of the Normal Form Boolean expression/operation by the Boolean logic unit;
a plurality of input/output interfaces in communication with the Boolean logic unit, wherein the plurality of input/output interfaces are configured for receiving a plurality of compiled Boolean expressions/operations and transmitting a plurality of compiled results; and
a plurality of registers coupled to the plurality of input/output interfaces, wherein the plurality of registers comprise;
a first register for storing the outcome of the most recently evaluated conjunct or disjunct; and
a second register for rolling up the results of the conjuncts or disjuncts;
wherein the second register is initially set to a default value;
wherein, the Boolean Logic unit is further configured to perform the following logic;
if the expression is a conjunct and the evaluation of the conjunct expression stored in the first register is zero or its logical equivalent, then the value of the second register is set to a value other than its default value;
if the expression is a disjunct and the evaluation of the disjunct expression stored in the first register is one or its logical equivalent, then the value of the second register is set to a value other than its default value;
if the value of the second register is set to a value other than its default value, then the processor halts evaluation of the remainder of the expression/operation and provides the result of the expression/operation via one of the input/output interfaces.
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Abstract
A processor including a Boolean logic unit, wherein the Boolean logic unit is operated for performing the short-circuit evaluation of a Normal Form Boolean expression/operation, a plurality of input/output interfaces in communication with the Boolean logic unit, wherein the plurality of input/output interfaces are operated for receiving a plurality of compiled Boolean expressions/operations and transmitting a plurality of compiled results, and a plurality of registers coupled to the plurality of input/output interface circuits, wherein the plurality of multi-bit registers include an instruction register, a first address register and a second address register.
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Citations
20 Claims
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1. A processor, comprising:
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a Boolean logic unit, wherein the Boolean logic unit is configured to perform a short-circuit evaluation of a Normal Form Boolean expression/operation, wherein performing a short-circuit evaluation comprises halting the evaluation of at least a portion of the Normal Form Boolean expression/operation if the outcome of the portion becomes known based on an outcome of an evaluation of a prior portion of the Normal Form Boolean expression/operation by the Boolean logic unit; a plurality of input/output interfaces in communication with the Boolean logic unit, wherein the plurality of input/output interfaces are configured for receiving a plurality of compiled Boolean expressions/operations and transmitting a plurality of compiled results; and a plurality of registers coupled to the plurality of input/output interfaces, wherein the plurality of registers comprise; a first register for storing the outcome of the most recently evaluated conjunct or disjunct; and a second register for rolling up the results of the conjuncts or disjuncts; wherein the second register is initially set to a default value; wherein, the Boolean Logic unit is further configured to perform the following logic; if the expression is a conjunct and the evaluation of the conjunct expression stored in the first register is zero or its logical equivalent, then the value of the second register is set to a value other than its default value; if the expression is a disjunct and the evaluation of the disjunct expression stored in the first register is one or its logical equivalent, then the value of the second register is set to a value other than its default value; if the value of the second register is set to a value other than its default value, then the processor halts evaluation of the remainder of the expression/operation and provides the result of the expression/operation via one of the input/output interfaces. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for processing a Boolean expression by performing a short-circuit evaluation of the Boolean expression using a processor comprising a Boolean logic unit, wherein the Boolean logic unit is in communication with a plurality of input/output interfaces, and a plurality of registers coupled to the plurality of input/output interfaces, the method comprising:
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(a) receiving a Normal Form Boolean expression, wherein the Normal Form Boolean expression comprises a conjunct or a disjunct; (b) storing the outcome of the most recently evaluated conjunct or disjunct in a first register; (c) initially setting a second register to a default value; (d) rolling up the results of a conjunct or disjunct in the second register; (e) setting the value of the second register to a value other than its default value if the expression is a conjunct and the evaluation of the conjunct expression stored in the first register is zero or its logical equivalent; (f) setting the value of the second register to a value other than its default value if the expression is a disjunct and the evaluation of the disjunct expression stored in the first register is one or its logical equivalent; and (g) halting the evaluation of the remainder of the expression/operation and providing the result of the expression/operation via an input/output interface if the value of the second register is set to a value other than its default value. - View Dependent Claims (12, 13, 14, 15, 16)
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17. A compiling method for converting a plurality of conditional tests into a result of a Boolean expression, said method comprising:
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receiving the plurality of conditional tests at a processor; based upon the received plurality of conditional tests, generating an operation, in computer-readable format, representative of the Boolean expression in Conjunctive Normal Form or Disjunctive Normal Form; storing the operation in a Boolean processor comprising a Boolean logic unit, wherein the Boolean logic unit is in communication with a plurality of input/output interfaces, and a plurality of registers coupled to the plurality of input/output interfaces; evaluating the Boolean expression by processing the operation and selectively short-circuiting a portion of the Boolean expression on the Boolean processor, wherein selectively short-circuiting a portion of the Boolean expression comprises; receiving a Normal Form Boolean expression, wherein the Normal Form Boolean expression comprises a conjunct or a disjunct; storing the outcome of the most recently evaluated conjunct or disjunct in a first register; initially setting a second register to a default value; rolling up the results of a conjunct or disjunct in the second register; setting the value of the second register to a value other than its default value if the expression is a conjunct and the evaluation of the conjunct expression stored in the first register is zero or its logical equivalent; setting the value of the second register to a value other than its default value if the expression is a disjunct and the evaluation of the disjunct expression stored in the first register is one or its logical equivalent; and halting the evaluation of the remainder of the expression/operation and providing the result of the expression/operation via an input/output interface if the value of the second register is set to a value other than its default value. - View Dependent Claims (18, 19, 20)
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Specification