Semiconductor device having variable parameter selection based on temperature and test method

• US 8,308,359 B2
• Filed: 01/15/2010
• Issued: 11/13/2012
• Est. Priority Date: 04/19/2006
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Intellectual Ventures Holding 83 LLC (Intellectual Ventures LLC)
• Inventors: Walker, Darryl G.
• Primary Examiner(s): Jagan, Mirellys
• Application Number:
  US12/688,662
• Publication Number:
  US 20110044372A1
• Time in Patent Office: 1,033 Days
• Field of Search: 374/176, 374/170, 374/178, 374/169, 327/513
• US Class Current: 374/176
• CPC Class Codes: G01K 7/425 Thermal management of integrated systems

Abstract

An apparatus including a temperature-sensing circuit. The temperature-sensing circuit can include an amplifier. The amplifier can include a positive input and a negative input. The negative input can be configured to be driven by a temperature-independent signal. A first transistor electrically can be connected to the positive input. The first transistor can be configured to be controlled by a temperature signal. A temperature threshold resistance and a hysteresis resistance can be electrically connected in series to the positive input. A second transistor can be electrically connected in parallel with the hysteresis resistance.

Claims

1. An apparatus comprising a temperature-sensing circuit, the temperature-sensing circuit comprising:

an amplifier including a positive input and a negative input, wherein the negative input is configured to be driven by a temperature-independent signal;

a first transistor electrically connected to the positive input, wherein the first transistor is configured to be controlled by a temperature signal;

a temperature threshold resistance and a hysteresis resistance, wherein the temperature threshold resistance and the hysteresis resistance are electrically connected in series to the positive input; and

a second transistor electrically connected in parallel with the hysteresis resistance.

2. The apparatus of claim 1, wherein the threshold resistance is a variable resistance.

3. The apparatus of claim 1, wherein the hysteresis resistance is a variable resistance.

4. The apparatus of claim 1, wherein the threshold resistance and the hysteresis resistance are programmable.

5. The apparatus of claim 1, wherein the hysteresis resistance is configured to be controlled, at least in part, by an output of the amplifier.

6. The apparatus of claim 5, wherein the output of the amplifier is configured to control the second transistor.

7. The apparatus of claim 6, wherein the second transistor is configured to shunt the hysteresis resistance if the output of the amplifier is at a low logic level.

8. The apparatus of claim 7, wherein the threshold resistance and the hysteresis resistance each comprise a series of resistors, each resistor including a shunt transistor configured to be controlled by a programming signal.

9. The apparatus of claim 7, wherein the threshold resistance and the hysteresis resistance each comprise a series of resistors and a fuse or an anti-fuse electrically connected in parallel with each resistor of the threshold resistance and the hysteresis resistance, and wherein each fuse or anti-fuse is configured to be controlled by a programming signal.

10. A method of sensing a temperature, the method comprising:

amplifying a positive input and a negative input with an amplifier, wherein the negative input is a temperature-independent signal and the positive input is provided by;

a first transistor configured to be controlled by a temperature signal indicative of the temperature; and

a temperature threshold resistance and a hysteresis resistance electrically connected in series, wherein a second transistor is electrically connected in parallel with the hysteresis resistance.

11. The method of claim 10, wherein the threshold resistance is a variable resistance.

12. The method of claim 10, wherein the hysteresis resistance is a variable resistance.

13. The method of claim 10, further comprising controlling the hysteresis resistance, at least in part, with an output of the amplifier.

14. The method of claim 13, wherein said controlling the hysteresis resistance comprises controlling the second transistor with the output of the amplifier.

15. The method of claim 14, further comprising shunting the hysteresis resistance with the second transistor if the output of the amplifier is at a low logic level.

16. The method of claim 10, further comprising programming the threshold resistance and the hysteresis resistance.

17. The method of claim 16, wherein the threshold resistance and the hysteresis resistance each comprise a series of resistors, each resistor including a shunt transistor, and wherein said programming the threshold resistance and the hysteresis resistance comprises controlling each shunt transistor with a programming signal.

18. The method of claim 16, wherein the threshold resistance and the hysteresis resistance each comprise a series of resistors and a fuse or an anti-fuse electrically connected in parallel with each resistor of the threshold resistance and the hysteresis resistance, and wherein said programming the threshold resistance and the hysteresis resistance comprises controlling each fuse or anti-fuse with a programming signal.

19. A method comprising:

sensing a temperature with a temperature-sensing circuit configured to provide a temperature indication based on a hysteresis value defined by a hysteresis resistance, wherein the temperature indication comprises a temperature indication logic level; and

shunting the hysteresis resistance based on the temperature indication logic level.

20. The method of claim 19, wherein the hysteresis resistance is a variable resistance.

21. The method of claim 19, further comprising programming the hysteresis resistance.

22. The method of claim 21, wherein the hysteresis resistance comprises a series of resistors, each resistor including a shunt transistor, and wherein said programming the hysteresis resistance comprises programming a register configured to control each shunt transistor.