Capacitive sensor device

• US 8,310,248 B2
• Filed: 02/02/2010
• Issued: 11/13/2012
• Est. Priority Date: 02/12/2009
• Status: Active Grant

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Mizuno, Kentaro, Ohta, Norikazu, Gotoh, Keisuke
• Primary Examiner(s): Rosario, Joshua Benitez
• Application Number:
  US12/656,542
• Publication Number:
  US 20100219848A1
• Time in Patent Office: 1,015 Days
• Field of Search: 324658-690, 737/80, 738/623.37, 738/626.26, 735/143.2, 737/18, 737/24
• US Class Current: 324/686
• CPC Class Codes: G01D 1/00 Measuring arrangements giving results other than momentary value of variable, of general application G01D3/00 takes precedence; in tariff metering apparatus G01D4/00; transducers not specially adapted for a specific variable G01D5/00
• CPC Class Codes: G01D 15/00 Component parts of recorders for measuring arrangements not specially adapted for a specific variable
• CPC Class Codes: G01D 21/00 Measuring or testing not otherwise provided for
• CPC Class Codes: G01H 11/06 by electric means
• CPC Class Codes: G01L 9/12 by making use of variations in capacitance , i.e. electric circuits therefor
• CPC Class Codes: G01P 15/125 by capacitive pick-up

Abstract

A capacitive sensor device includes first and second sensor capacitors coupled in series, a clock signal generating part, an operational amplifier, a feedback capacitor, a compensating capacitor, and a compensating signal generating part. The clock signal generating part generates a first clock signal and the second clock signal applied to the first and second sensor capacitors, respectively. The compensating signal generating part generates a compensating signal applied to the compensating capacitor. The first clock signal and the second clock signal have the same frequency and the same amplitude and have phases being opposite each other. The compensating signal has a frequency same as the first clock signal and the second clock signal, has a phase same as one of the first clock signal and the second clock signal, and has an amplitude that is adjustable.

Claims

1. A capacitive sensor device comprising:

a first sensor capacitor and a second sensor capacitor coupled in series at a connection portion;

a clock signal generating part that generates a first clock signal and a second clock signal, the first clock signal applied to an open end of the first sensor capacitor, the second clock signal applied to an open end of the second sensor capacitor;

an operational amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal, the inverting input terminal coupled with the connection portion of the first sensor capacitor and the second sensor capacitor, the non-inverting input terminal applied with a reference voltage;

a feedback capacitor coupling the output terminal and the inverting input terminal of the operational amplifier;

a compensating capacitor coupled with the connection portion of the first sensor capacitor and the second sensor capacitor; and

a compensating signal generating part that generates a compensating signal applied to an open end of the compensating capacitor, wherein;

the first sensor capacitor and the second sensor capacitor have electrostatic capacitances that change in accordance with an applied physical quantity;

the first clock signal and the second clock signal have a same frequency and a same amplitude and have phases being opposite each other; and

the compensating signal has a frequency same as the first clock signal and the second clock signal, has a phase same as the first clock signal or the second clock signal, and has an amplitude that is adjustable.

2. The capacitive sensor device according to claim 1, further comprising another compensating capacitor coupled with the connection portion of the first sensor capacitor and the second sensor capacitor, wherein

an electrostatic capacitance of the another compensating capacitor is set to be smaller than an electrostatic capacitance of the compensating capacitor, and the first clock signal or the second clock signal having an opposite phase with the compensating signal is applied to an open end of the another compensating capacitor.