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Automatic identification of systematic repeating defects in semiconductor production

  • US 8,312,395 B2
  • Filed: 01/14/2011
  • Issued: 11/13/2012
  • Est. Priority Date: 01/15/2010
  • Status: Active Grant
First Claim
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1. A method for processing an integrated circuit device, the method comprising:

  • providing a partially completed semiconductor wafer, the partially completed semiconductor wafer including one or more patterns;

    capturing an image of the one or more patterns using one or more scans across a surface of the partially completed wafer;

    processing information associated with the image of the one or more patterns in a first format into a second format;

    determining defect information associated with the image of the one or more patterns in the second format;

    processing using a clustering process the defect information of the partially completed wafer to identify at least one defect associated with a spatial location of a repeating pattern on the partially completed wafer provided by a reticle;

    identifying the reticle associated with the at least one defect and a stepper associated with the reticle having the at least one defect; and

    ceasing operation of the stepper.

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