Automatic identification of systematic repeating defects in semiconductor production

• US 8,312,395 B2
• Filed: 01/14/2011
• Issued: 11/13/2012
• Est. Priority Date: 01/15/2010
• Status: Active Grant

• Current Assignee: Semiconductor Manufacturing International (Shanghai) Corporation (Semiconductor Manufacturing International Corporation)
• Original Assignee: Semiconductor Manufacturing International (Shanghai) Corporation (Semiconductor Manufacturing International Corporation)
• Inventors: Lin, Paul Kuang Chi, Kang, Dong, Wang, Yong Gang, Zhang, Yulei
• Primary Examiner(s): Memula, Suresh
• Application Number:
  US13/007,556
• Publication Number:
  US 20120023464A1
• Time in Patent Office: 669 Days
• Field of Search: 716/54, 716/52
• US Class Current: 716/52
• CPC Class Codes: G01N 2021/8877 Proximity analysis, local statistics
• CPC Class Codes: G01N 21/8851 Scan or image signal processing specially adapted therefor, e.g. for scan signal adjustment, for detecting different kinds of defects, for compensating for structures, markings, edges G01N21/8806 and G01N21/93 - G01N21/95692 take precedence; optical measurement of dimensions G01B11/00; optical scanning G02B26/10; image transformation G06T3/00; computerised image enhancement G06T5/00; image processing per se for flaw detection G06T7/0002
• CPC Class Codes: G01N 21/9501 Semiconductor wafers manufacturing processes per se of semiconductor devices implementing a measuring step H01L22/10
• CPC Class Codes: G01N 21/956 Inspecting patterns on the surface of objects contactless testing of electronic circuits G01R31/308; testing currency G07D; manufacturing processes per se of semiconductor devices implementing a measuring step H01L22/10
• CPC Class Codes: G03F 1/84 Inspecting

Abstract

A method includes capturing an image of the pattern using one or more scans across a surface of the partially completed wafer. The method includes processing information associated with the captured image of the pattern in a first format (e.g., pixel domain) into a second format, e.g., transform domain. The method includes determining defect information associated with the image of the pattern in the second format and processing the defect information (e.g., wafer identification, product identification, layer information, x-y die scanned) to identify at least one defect associated with a spatial location of a repeating pattern on the partially completed wafer provided by a reticle. The method includes identifying the reticle associated with the defect and a stepper associated with the reticle having the defect and ceasing operation of the stepper. The damaged reticle is replaced, and the process resumes using a replaced reticle.

Claims

1. A method for processing an integrated circuit device, the method comprising:

providing a partially completed semiconductor wafer, the partially completed semiconductor wafer including one or more patterns;

capturing an image of the one or more patterns using one or more scans across a surface of the partially completed wafer;

processing information associated with the image of the one or more patterns in a first format into a second format;

determining defect information associated with the image of the one or more patterns in the second format;

processing using a clustering process the defect information of the partially completed wafer to identify at least one defect associated with a spatial location of a repeating pattern on the partially completed wafer provided by a reticle;

identifying the reticle associated with the at least one defect and a stepper associated with the reticle having the at least one defect; and

ceasing operation of the stepper.

2. The method of claim 1 wherein the defect information provides data in a format of wafer identification, product identification, layer information, and x-y die scanned.

3. The method of claim 1 wherein the defect information comprises a number of defects.

4. The method of claim 1 wherein the defect information comprises a die identification, a location of defect on the die, and a type of defect.

5. The method of claim 1 wherein the repeating pattern on the reticle comprises at least four of the repeating patterns.

6. The method of claim 1 wherein the one or more patterns on the partially completed wafer are associated with one or more metal patterns.

7. The method of claim 1 wherein the one or more patterns on the partially completed wafer are associated with one or more STI patterns.

8. The method of claim 1 wherein the one or more patterns on the partially completed wafer are associated with one or more dielectric patterns.

9. The method of claim 1 wherein the one or more patterns on the partially completed wafer are associated with one or more gate patterns.

10. The method of claim 1 wherein the clustering process comprises a hierarchical clustering process.

11. The method of claim 10 wherein the hierarchical clustering process is a hierarchical agglomerative clustering process.

12. The method of claim 1 wherein the at least one defect is associated with a particle.

13. The method of claim 1 wherein the at least one defect is associated with a crack in the reticle.

14. The method of claim 1 wherein the at least one defect is associated with a growth provided on a portion of the reticle.

15. The method of claim 1 wherein the determining defect information associated with the image of the pattern in the second format and the processing the defect information of the partially completed wafer to identify at least one defect associated with a spatial location of a repeating pattern on a reticle are performed automatically.

16. The method of claim 1 further comprising outputting the at least one defect in visual form.

17. The method of claim 1 wherein the at least one defect is associated with a plurality of repeating defects.

18. A system for processing an integrated circuit device, the system comprising:

an image capturing unit configured to capture an image of a partially completed wafer;

a processor unit configured to convert information associated with the captured image into a transform domain; and

a memory unit coupled to the processor unit, the memory unit comprising;

one or more program codes configured to determine defect information associated with the captured image in the transform domain;

one or more program codes configured to process the defect information using a clustering analysis to identify at least one defect associated with a spatial location of a repeating pattern provided by a reticle on the partially completed wafer; and

one or more codes configured to identify the reticle associated with the at least one defect.

19. The system of claim 18 wherein the clustering analysis comprises a hierarchical clustering process.

20. The system of claim 19 wherein the hierarchical clustering process is an agglomerative clustering process.