Method and system for calibrating a light emitting device display

• US 8,314,783 B2
• Filed: 12/01/2005
• Issued: 11/20/2012
• Est. Priority Date: 12/01/2004
• Status: Active Grant

• Current Assignee: IGNIS Innovation Incorporated
• Original Assignee: IGNIS Innovation Incorporated
• Inventors: Sambandan, Sanjiv, Servati, Peyman, Nathan, Arokia
• Primary Examiner(s): Boddie, William
• Assistant Examiner(s): Shapiro, Leonid
• Application Number:
  US11/291,301
• Publication Number:
  US 20060149493A1
• Time in Patent Office: 2,546 Days
• Field of Search: 345/204, 345/76, 345/55
• US Class Current: 345/204
• CPC Class Codes: G09G 2300/0417 Special arrangements specific to the use of low carrier mobility technology
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 2320/029 by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
• CPC Class Codes: G09G 2320/0693 Calibration of display systems
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3291 in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements

Abstract

A method and system for calibrating a light emitting device display is provided. The display includes a plurality of pixel circuits, each having a light emitting device. The system for the calibration monitors current drawn from a row of the display array, and generates a correction parameter to correct brightness level of the light emitting device.

Claims

1. A system for calibration of a display array having a plurality of pixel circuits in columns and rows, comprising:

a dummy pixel area having a plurality of dummy pixels in a dummy row, each corresponding to a pixel in a row of the display array;

an error extraction system for extracting an error between a current in a row of the display array and a reference current associated with the dummy row, the dummy pixels in the dummy row receiving a data voltage substantially identical to that received at the pixels in the corresponding row of the display array, the error extraction system including;

a first sensor for monitoring a current in the corresponding row of the display array; and

a second sensor for monitoring a current in the dummy row and generating a reference current based on the monitored current in the dummy row; and

an estimation system for estimating a correction parameter for compensating a data voltage provided to the display array, based on an error between the monitored current output from the first sensor and the reference current.

2. A system according to claim 1, comprising a system for controlling and scheduling a normal display operation and a calibration operation to the display array, and wherein the controlling and scheduling system selects a row of the display array so as to separately implement the calibration to the rows of the display array.

3. A system according to claim 2, comprising:

a first switch system for connecting voltage lines coupled to the pixel circuits in the row of the display array to a main voltage supply,

a second switch system for selectively connecting a voltage line of the display array to the estimation system, and

a third switch system for connecting the dummy pixel circuits to a driver for providing the data voltages, and

wherein the controlling and scheduling system manages the operations of the first, second and third switch systems.

4. A system according to claim 3, wherein during the calibration operation, the voltage lines of the display array are sequentially connected to the error extraction system through the second switch system, and wherein the dummy pixel circuits are connected to the data driver through the third switch system.

5. A system according to claim 1, wherein the error extraction system comprises:

a comparator for comparing the monitored current output from the first sensor with the reference current output from the second sensor,

and wherein during the calibration operation, the current in each row of the display array is monitored, and compared with the reference current.

6. A system according to claim 3, wherein during the normal display operation, the voltage lines of the display array are connected to the main voltage supply through the first switch system, and wherein the dummy pixel circuits are disconnected from the data driver.

7. A system according to claim 1, wherein the estimation system includes a look up table for storing a plurality of correction parameters, and the estimation system retrieves a corresponding correction parameter for the row of the display array from the look up table based on the error.

8. A system according to claim 7, wherein the estimation system retrieves the corresponding correction parameter for the row of the display array from the look up table based on the error and a total data voltage applied to the pixel circuits in the row of the display array.

9. A system according to claim 1, wherein data voltages for the pixel circuits in the display array are compensated based on the average of the correction parameters for the rows of the display array.

10. A system according to claim 1, wherein the error extraction system comprises:

a comparator for comparing the current monitored by the first sensor with the reference current to provide the error, and wherein the error estimation system comprises;

a circuit for calculating a mapping parameter associated with the correction parameter and specific to a total data voltage applied to the pixel circuits in the row of the display array and the transfer function of the comparator.

11. A system according to claim 1, wherein the estimation system comprises:

a calculation module for calculating a corresponding correction parameter for the row of the display array based on the error.

12. A system according to claim 11, wherein the calculation module calculates the corresponding correction parameter for the row of the display array based on the error and a total data voltage applied to the pixel circuits in the row of the display array.

13. A system according to claim 12, wherein data voltages for the pixel circuits in the display array are compensated based on the average of the correction parameters for the rows of the display array.

14. A system according to claim 1, wherein at least one of the first sensor and the second sensor includes a current mirror.

15. A system according to claim 1, wherein the pixel circuit includes a light emitting device and a driver transistor connected to the light emitting device, the light emitting device or the driver transistor being connected to a voltage supply in a corresponding row of the display array, and the first sensor monitoring a current drawn from the voltage supply.

16. A system according to claim 1, wherein the pixel circuit is a voltage programmed pixel circuit.

17. A system according to claim 1, wherein the display array is an AMOLED display array.

18. A system according to claim 1, wherein the display array has a-Si, polysilicon, or crystalline based backplane.

19. A system according to claim 1, wherein the pixel circuit has n-type transistors.

20. A system according to claim 1, wherein the pixel circuit has p-type transistors.

21. A method of calibration of a display array having a plurality of pixel circuits in columns and rows, comprising:

extracting an error, including;

in a calibration operation, providing a data voltage to a plurality of dummy pixel circuits in a dummy row, monitoring a current in the dummy row and generating a reference current based on the monitored current, a dummy pixel circuit corresponding to a pixel circuit in a row of the display array,

in the calibration operation, providing the substantially identical data voltage to corresponding pixel circuits in the row of the display array and monitoring a current in the row of the display array, and

obtaining the error between the monitored current in the row of the display array and the reference current; and

estimating a correction parameter for compensating a data voltage provided to the display array in a normal display operation, based on the error.

22. A method according to claim 21, comprising:

selecting a next row of the display array and repeating the steps of extracting an error and estimating a correction parameter, and

calculating an average of the correction parameters for the rows of the display array.

23. A method according to claim 22, comprising:

compensating data voltages for the pixel circuits in the display array based on the average of the correction parameters.

24. A method according to claim 21, wherein the step of providing data voltages to a plurality of dummy pixel circuits comprises:

connecting the dummy pixel circuits to a data driver for providing the data voltages.

25. A method according to claim 21, wherein the step of estimating comprises:

estimating the correction parameter for the row of the display array, based on the error and a total data voltage applied to the pixel circuits in the row of the display array.

26. A method according to claim 25, comprising compensating data voltages for the pixel circuits in the display array based on an average of the correction parameters for the rows of the display array.

27. A method according to claim 21, wherein the step of estimating comprises:

calculating a corresponding correction parameter for the row of the display array, based on the error.

28. A method according to claim 21, wherein the step of estimating comprises:

retrieving a corresponding correction parameter for the row of the display array from a look up table based on the error.

29. A method according to claim 21, wherein the step of monitoring a current in the row of the display array comprises:

monitoring the current in the row of the display array through a voltage line coupled to the pixels circuits in the row of the display array.

30. The method of claim 21, further comprising:

controlling and scheduling the normal display operation and the calibration operation by;

connecting voltage lines coupled to the pixel circuits in the row of the display array to a main voltage supply during the normal display operation;

selectively connecting a selected voltage line of the voltage lines of the display array during the calibration operation to extract the error; and

connecting the dummy pixel circuits to a driver for providing the data voltages during the calibration operation.

31. A system for calibration of a display array having a plurality of pixel circuits in columns and rows, comprises:

a dummy pixel area having a plurality of dummy pixel circuits in a dummy row, each corresponding to a pixel circuit in a row of a display array,

a device for controlling a calibration operation for the display array, pixel circuits in the row of the display array receiving a data voltage and the dummy pixel circuits receiving a data voltage substantially identical to that received at the pixel circuits in the row of the display array,

a comparator for comparing a current in the row of the display array with a current in the dummy row and outputting an error based on the comparison result, and

an estimation system for estimating a correction parameter for compensating a data voltage provided to the display array, based on the error.

32. A system according to claim 31, wherein the estimation system comprises:

a look up table for storing a plurality of correction parameters, the estimation system retrieving a corresponding correction parameter for the row of the display array from the look up table based on the error.

33. A system according to claim 32, wherein the estimation system retrieves the corresponding correction parameter for the row of the display array from the look up table based on the error and a total data voltage applied to the pixel circuits in the row of the display array.

34. A system according to claim 33, data voltages for the pixel circuits in the display array are compensated based on the average of the correction parameters for the rows of the display array.

35. A system according to claim 33, wherein the look up table includes a mapping parameter specific to the total data voltage and the transfer function of the comparator.

36. A system according to claim 31, wherein the estimation system comprises:

a calculation module for calculating a corresponding correction parameter for the row of the display array based on the error.

37. A system according to claim 36, wherein the calculation module calculates the corresponding correction parameter for the row of the display array based on the error and a total data voltage applied to the pixel circuits in the row of the display array.

38. A system according to claim 37, wherein data voltages for the pixel circuits in the display array are compensated based on the average of the correction parameters for the rows of the display array.

39. A system according to claim 31, comprising:

a first module for monitoring the current in the row of the display array in the calibration operation; and

a second module for monitoring the current in the dummy row in the calibration operation, at least one of the first module and the second module including a current mirror.

40. A system according to claim 31,

wherein the pixel circuit includes a light emitting device and a driver transistor connected to the light emitting device, the light emitting device or the driver transistor being connected to a voltage supply in a corresponding row of the display array, and wherein the current in the row of the display array is monitored from the voltage supply.

41. The system of claim 31, further comprising:

a controller and scheduler system for controlling and scheduling a normal display operation and a calibration operation to the display array, and wherein the controller and scheduler system selects a row of the display array so as to separately implement the calibration to the rows of the display array;

a first switch system for connecting voltage lines coupled to the pixel circuits in the row of the display array to a main voltage supply;

a second switch system for selectively connecting a voltage line of the display array to the estimation system; and

a third switch system for connecting the dummy pixel circuits to a driver for providing the data voltages, wherein the controller and scheduler system manages the operations of the first, second and third switch systems.

42. A system for calibration of a display array having a plurality of pixel circuits in columns and rows, comprising:

a dummy pixel area having a plurality of dummy pixels in a dummy row, each corresponding to a pixel in a row of the display array;

an error extraction system for extracting an error between a current in a row of the display array and a reference current associated with the dummy row, the dummy pixels in the dummy row receiving a data voltage substantially identical to that received at the pixels in the corresponding row of the display array, the error extraction system including;

a first sensor for monitoring a current in the corresponding row of the display array; and

a second sensor for monitoring a current in the dummy row and generating a reference current based on the monitored current in the dummy row;

an estimation system for estimating a correction parameter for compensating a data voltage provided to the display array, based on an error between the monitored current output from the first sensor and the reference current;

a controller and scheduler system for controlling and scheduling a normal display operation and a calibration operation to the display array, and wherein the controller and scheduler system selects a row of the display array so as to separately implement the calibration to the rows of the display array;

a first switch system for connecting voltage lines coupled to the pixel circuits in the row of the display array to a main voltage supply;

a second switch system for selectively connecting a voltage line of the display array to the estimation system; and

a third switch system for connecting the dummy pixel circuits to a driver for providing the data voltages, wherein the controller and scheduler system manages the operations of the first, second and third switch systems.