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Device including nonvolatile memory element

  • US 8,319,267 B2
  • Filed: 11/10/2010
  • Issued: 11/27/2012
  • Est. Priority Date: 11/13/2009
  • Status: Active Grant
First Claim
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1. A semiconductor device comprising:

  • a nonvolatile memory element and a transistor,wherein the nonvolatile memory element comprises;

    a control gate;

    a charge accumulation layer overlapping with the control gate; and

    a first oxide semiconductor layer including a channel formation region and overlapping with the charge accumulation layer,wherein the transistor comprises;

    a gate electrode; and

    a second oxide semiconductor layer including a channel formation region and overlapping with the gate electrode with an insulating film interposed between the second oxide semiconductor layer and the gate electrode,wherein the nonvolatile memory element and the transistor are electrically connected to each other.

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