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Spread spectrum clock generator with controlled delay elements

  • US 8,320,428 B1
  • Filed: 06/19/2010
  • Issued: 11/27/2012
  • Est. Priority Date: 02/20/2004
  • Status: Active Grant
First Claim
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1. An integrated circuit comprising:

  • a processor;

    an input lead; and

    a spread spectrum clock generator that receives a clock signal from the input lead and outputs a delayed clock signal to the processor,wherein the spread spectrum clock generator includes a programmable register storing programmable bits that are writable by the processor, wherein if a first digital logic value of the programmable bits is stored in the programmable register then the delayed clock signal has a substantially constant frequency, and wherein if a second digital logic value of the programmable bits is stored in the programmable register then the delayed clock signal has a variably dithered frequency.

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