Pulse signal output circuit and shift register

• US 8,320,516 B2
• Filed: 02/22/2011
• Issued: 11/27/2012
• Est. Priority Date: 03/02/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Toyotaka, Kouhei
• Primary Examiner(s): Lam, Tuan T
• Application Number:
  US13/031,717
• Publication Number:
  US 20110216874A1
• Time in Patent Office: 644 Days
• Field of Search: None
• US Class Current: 377/64
• CPC Class Codes: G11C 19/184 with field-effect transistors, e.g. MOS-FET
• CPC Class Codes: G11C 19/28 using semiconductor elements G11C19/14, G11C19/36 take precedence
• CPC Class Codes: H03K 19/0013 in field effect transistor circuits
• CPC Class Codes: H03K 19/096 Synchronous circuits, i.e. using clock signals H03K19/01728, H03K19/01855 take precedence
• CPC Class Codes: H03K 23/44 using field-effect transistors H03K23/46 and H03K23/425 take precedence

Abstract

An object of the present invention is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. In an embodiment of the pulse signal output circuit, a transistor has a source terminal or a drain terminal connected to a gate electrode of another transistor having a source terminal or a drain terminal forming an output terminal of the pulse signal output circuit, the channel length of the transistor being longer than the channel length of the other transistor. Thereby, the amount of a leakage current modifying the gate potential of the other transistor can be reduced, and a malfunction of the pulse signal output circuit can be prevented.

Claims

1. A pulse signal output circuit comprising:

a first transistor and a second transistor, a first terminal of the first transistor and a first terminal of the second transistor being electrically connected to a first output terminal;

a third transistor and a fourth transistor, a first terminal of the third transistor and a first terminal of the fourth transistor being electrically connected to a second output terminal;

a fifth transistor; and

a sixth transistor,

wherein a first terminal of the fifth transistor, a gate of the first transistor and a gate of the third transistor are electrically connected to each other;

wherein a gate of the fifth transistor, a first terminal of the sixth transistor, a gate of the second transistor and a gate of the fourth transistor are electrically connected to each other; and

wherein a channel of the fifth transistor and a channel of the sixth transistor are each longer than a channel of the third transistor and a channel of the fourth transistor.

2. A pulse signal output circuit comprising:

a first transistor and a second transistor, a first terminal of the first transistor and a first terminal of the second transistor being electrically connected to a first output terminal;

a third transistor and a fourth transistor, a first terminal of the third transistor and a first terminal of the fourth transistor being electrically connected to a second output terminal;

a first input signal generation circuit comprising a fifth transistor; and

a second input signal generation circuit comprising a sixth transistor,

wherein a first terminal of the fifth transistor, a gate of the first transistor and a gate of the third transistor are electrically connected to each other;

wherein a gate of the fifth transistor, a first terminal of the sixth transistor, a gate of the second transistor and a gate of the fourth transistor are electrically connected to each other; and

wherein a channel of the fifth transistor and a channel of the sixth transistor are each longer than a channel of the third transistor and a channel of the fourth transistor.

3. A pulse signal output circuit according to claim 2, wherein a second terminal of the fifth transistor and a second terminal of the sixth transistor are electrically connected to a power supply line.

4. A pulse signal output circuit according to claim 2, further comprising a capacitor electrically connected between the gate and a second terminal of the second transistor.

5. A pulse signal output circuit according to claim 2, wherein any one of the fifth transistor and the sixth transistor is a transistor having a multi-gate structure where at least two gates are arranged in series.

6. A pulse signal output circuit according to claim 2, wherein any one of the transistors includes an oxide semiconductor.

7. A shift register circuit including a pulse signal output circuit according to claim 2.

8. An electronic device including a pulse signal output circuit according to claim 2.

9. A pulse signal output circuit comprising:

a first transistor and a second transistor, a first terminal of the first transistor and a first terminal of the second transistor being electrically connected to a first output terminal;

a third transistor and a fourth transistor, a first terminal of the third transistor and a first terminal of the fourth transistor being electrically connected to a second output terminal;

a first input signal generation circuit comprising a fifth transistor and a sixth transistor; and

a second input signal generation circuit comprising a seventh transistor, an eighth transistor and a ninth transistor,

wherein a first terminal of the fifth transistor, a first terminal of the sixth transistor, a gate of the first transistor and a gate of the third transistor are electrically connected to each other;

wherein a gate of the sixth transistor, a first terminal of the seventh transistor, a first terminal of the eighth transistor, a first terminal of the ninth transistor, a gate of the second transistor and a gate of the fourth transistor are electrically connected to each other; and

wherein a channel of the sixth transistor and a channel of the ninth transistor are each longer than a channel of the third transistor and a channel of the fourth transistor.

10. A pulse signal output circuit according to claim 9,

wherein a first power supply line is electrically connected to a second terminal of the fifth transistor, a second terminal of the seventh transistor and a second terminal of the eighth transistor;

wherein a second power supply line is electrically connected to a second terminal of the sixth transistor, a second terminal of the ninth transistor, a second terminal of the second transistor and a second terminal of the fourth transistor;

wherein a pulse signal line is electrically connected to a gate of the fifth transistor and a gate of the ninth transistor;

wherein a first clock signal line is electrically connected to a second terminal of the first transistor and a second terminal of the third transistor;

wherein a second clock signal line is electrically connected to a gate of the eighth transistor; and

wherein an input line is electrically connected to a gate of the seventh transistor.

11. A pulse signal output circuit according to claim 9, further comprising a tenth transistor configured to control an electrical connection of the first terminal of the fifth transistor and the first terminal of the sixth transistor to the gate of the first transistor and the gate of the third transistor,

wherein a gate of the tenth transistor is electrically connected a second terminal of the fifth transistor.

12. A pulse signal output circuit according to claim 9, further comprising an eleventh transistor having a first terminal electrically connected to a second terminal of the eighth transistor,

wherein a gate of the eleventh transistor is electrically connected to a clock signal line.

13. A pulse signal output circuit according to claim 9, further comprising a capacitor electrically connected between the gate and a second terminal of the second transistor.

14. A pulse signal output circuit according to claim 9, wherein any one of the sixth transistor and the ninth transistor is a transistor having a multi-gate structure where at least two gates are arranged in series.

15. A pulse signal output circuit according to claim 9, wherein any one of the transistors includes an oxide semiconductor.

16. A shift register circuit including a pulse signal output circuit according to claim 9.

17. An electronic device including a pulse signal output circuit according to claim 9.