Method of manufacturing an interposer

• US 8,322,031 B2
• Filed: 09/16/2008
• Issued: 12/04/2012
• Est. Priority Date: 08/27/2004
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Chong, Chin Hui, Lee, Choon Kuan
• Primary Examiner(s): ARBES, CARL J
• Application Number:
  US12/211,529
• Publication Number:
  US 20090008144A1
• Time in Patent Office: 1,540 Days
• Field of Search: 298/42, 298/74, 298/77, 298/78, 298/83, 298/84, 298/52
• US Class Current: 29/852
• CPC Class Codes: H01R 12/526 the printed circuits being on the same board with plated through holes H05K3/42
• CPC Class Codes: H05K 1/115 Via connections; Lands around holes or via connections H05K1/112 takes precedence
• CPC Class Codes: H05K 2201/09836 Oblique hole, via or bump
• CPC Class Codes: H05K 3/42 Plated through-holes or plated via connections
• CPC Class Codes: Y10T 29/49147 Assembling terminal to base
• CPC Class Codes: Y10T 29/49165 by forming conductive walled aperture in base
• CPC Class Codes: Y10T 29/49204 Contact or terminal manufacturing
• CPC Class Codes: Y10T 29/4921 with bonding
• CPC Class Codes: Y10T 29/49211 of fused material
• CPC Class Codes: Y10T 29/4922 with molding of insulation

Abstract

Circuit boards, microelectronic devices, and other apparatuses having slanted vias are disclosed herein. In one embodiment, an apparatus for interconnecting electronic components includes a dielectric portion having a first surface and a second surface. A first terminal is disposed on the first surface of the dielectric portion for connection to a first electronic component. A second terminal is disposed on the second surface of the dielectric portion for connection to a second electronic component. The apparatus further includes a passage extending through the dielectric portion along a longitudinal axis oriented at an oblique angle relative to the first surface. The passage is at least partially filled with conductive material electrically connecting the first terminal to the second terminal.

Claims

1. A method for manufacturing an apparatus for interconnecting electronic components, the method comprising:

form a dielectric substrate having a first surface facing opposite to a second surface;

forming a first passage through the dielectric substrate along a first longitudinal axis oriented at a first oblique angle relative to the first surface;

after forming the first passage, at least partially filling the first passage with conductive material;

forming a second passage through the dielectric substrate along a second longitudinal axis oriented at a second oblique angle relative to the surface of the dielectric substrate, wherein the second longitudinal axis is non-parallel to the first longitudinal axis;

after forming the second passage, at least partially filling the second passage with conductive material;

electrically coupling the conductive material in the first passage to a first terminal on the first surface of the dielectric substrate and a second terminal on the second surface of the dielectric substrate; and

electrically coupling the conductive material in the second passage to a third terminal on the first surface of the dielectric substrate and a fourth terminal on the second surface of the dielectric substrate, wherein the third terminal is spaced apart from the first terminal in a first direction, and wherein the fourth terminal is spaced apart from the second terminal in a second direction, opposite to the first direction.

2. The method of claim 1, further comprising:

electrically coupling the conductive material in the first passage to a first terminal on the first surface of the dielectric substrate; and

electrically coupling the conductive material in the second passage to a second terminal on the first surface of the dielectric substrate, wherein the second terminal is spaced apart from the first terminal.

3. The method of claim 1, further comprising:

electrically coupling the conductive material in the first passage to a first wire bond on the first surface of the dielectric substrate; and

electrically coupling the conductive material in the second passage to a second wire bond on the first surface of the dielectric substrate.

4. The method of claim 1, further comprising:

electrically coupling the conductive material in the first passage to a first terminal on the first surface of the dielectric substrate and a second terminal on the second surface of the dielectric substrate; and

electrically coupling the conductive material in the second passage to a third terminal on the first surface of the dielectric substrate and a fourth terminal on the second surface of the dielectric substrate.

5. The method of claim 1 wherein forming a first passage through the dielectric substrate includes drilling the first passage at a first oblique angle relative to the first surface.

6. The method of claim 1 wherein forming a first passage through the dielectric substrate includes forming the first passage with a laser at a first oblique angle relative to the first surface.

7. A method for manufacturing an apparatus for interconnecting electronic components, the method comprising:

forming a dielectric portion having a first surface facing opposite to a second surface;

forming a first terminal on the first surface of the dielectric portion;

forming a second terminal on the second surface of the dielectric portion;

forming a third terminal on the first surface of the dielectric portion;

forming a fourth terminal on the second surface of the dielectric portion;

forming a first passage through the dielectric portion along a first longitudinal axis oriented at a first oblique angle relative to the first surface;

forming a second passage through the dielectric portion along a second longitudinal axis oriented at a second oblique angle relative to the first surface, wherein the second oblique angle is different than the first oblique angle;

at least partially filling the first passage with conductive material to electrically connect the first terminal to the second terminal; and

at least partially filling the second passage with conductive material to electrically connect the third terminal to the fourth terminal, wherein the third terminal is spaced apart from the first terminal in a direction, and wherein the fourth terminal is spaced apart from the second terminal in a second direction, opposite to the first direction.

8. The method of claim 7, further comprising:

forming a first conductive line on the first surface of the dielectric portion and connecting the first terminal to the conductive material in the first passage; and

forming a second conductive line on the second surface of the dielectric portion and connecting the second terminal to the conductive material in the second passage.

9. The method of claim 7 wherein at least partially filling the first passage with conductive material includes leaving the first passage at least partially hollow.

10. The method of claim 7 wherein forming a first terminal on the first surface of the dielectric portion includes forming the first terminal at a first end of the first passage for connection to a first electronic component, and wherein forming a second terminal on the second surface of the dielectric portion includes forming the second terminal at a second end of the first passage for connection to a second electronic component.

11. The method of claim 7:

wherein forming a first terminal on the first surface of the dielectric portion includes forming the first terminal for connection to a first electronic component; and

wherein forming a second terminal on the second surface of the dielectric portion includes forming the second terminal for connection to a second electronic component.

12. A method for manufacturing an apparatus for interconnecting electronic components, the method comprising:

forming a first conductive line on a first surface of a non-conductive substrate;

forming a second conductive line on a second surface of the non-conductive substrate, the second surface of the non-conductive substrate facing opposite to the first surface of the non-conductive substrate;

forming a third conductive line on the first surface of the non-conductive substrate, wherein the third conductive line is at least partially offset from the first conductive line in a first direction;

forming a fourth conductive line on the second surface of the non-conductive substrate, wherein the fourth conductive line is at least partially offset from the second conductive line in a second direction opposite to the first direction;

forming a first passage through the non-conductive substrate from the first conductive line to the second conductive line along a first longitudinal axis oriented at a first oblique angle relative to the first surface of the non-conductive substrate;

after forming the first passage, at least partially filling the first passage with conductive material to electrically connect the first conductive line to the second conductive line;

forming a second passage through the non-conductive substrate from the third conductive line to the fourth conductive line along a second longitudinal axis oriented at a second oblique angle relative to the first surface of the non-conductive substrate; and

after forming the second passage, at least partially filling the second passage with conductive material to electrically connect the third conductive line to the fourth conductive line.

13. The method of claim 12 wherein forming a second passage through the non-conductive substrate includes forming the second passage along a second longitudinal axis that is non-parallel to the first longitudinal axis.

14. The method of claim 12, further comprising forming a printed circuit board substrate, wherein the printed circuit board substrate includes the non-conductive substrate.

15. The method of claim 12, further comprising forming a microelectronic device, wherein the microelectronic device includes the non-conductive substrate.

16. The method of claim 12, further comprising forming a silicon wafer, wherein the silicon wafer includes the non-conductive substrate.

17. The method of claim 12, further comprising:

laminating a first conductive layer on the first surface of the non-conductive substrate; and

laminating a second conductive layer on the second surface of the non-conductive substrate, wherein forming the first conductive line on the first surface of the non-conductive substrate includes removing a portion of the first conductive layer, and wherein forming the second conductive line on the second surface of the non-conductive substrate includes removing a portion of the second conductive layer.

18. The method of claim 12, further comprising:

laminating a first metal layer on the first surface of the non-conductive substrate; and

laminating a second metal layer on the second surface of the non-conductive substrate, wherein forming the first conductive line on the first surface of the non-conductive substrate includes etching away a portion of the first metal layer, and wherein forming the second conductive line on the second surface of the non-conductive substrate includes etching away a portion of the second metal layer.

19. The method of claim 12, further comprising:

laminating a first metal layer on the first surface of the non-conductive substrate; and

laminating a second metal layer on the second surface of the non-conductive substrate, wherein forming the first passage through the non-conductive substrate includes forming a hole through the first and second metal layers with a laser.