Electrical switching module

• US 8,324,761 B2
• Filed: 03/31/2010
• Issued: 12/04/2012
• Est. Priority Date: 11/13/2009
• Status: Active Grant

• Current Assignee: Leviton Manufacturing Company Incorporated
• Original Assignee: Leviton Manufacturing Company Incorporated
• Inventors: Elliott, Randall B., Leinen, Richard A., Hick, Robert L., Parsons, Kevin, Muthu, Subramanian
• Primary Examiner(s): Deberadinis, Robert L.
• Application Number:
  US12/751,993
• Publication Number:
  US 20110115448A1
• Time in Patent Office: 979 Days
• Field of Search: 307/125
• US Class Current: 307/125
• CPC Class Codes: H05B 47/18 via data-bus transmission

Abstract

A module including a case; an electrical switching device configured to control power to a load; and a controller coupled to the electrical switching device. The electrical switching device and the controller are substantially encapsulated by the case. Functionality of the module can be exposed through a communication interface in the case.

Claims

1. A circuit comprising:

an electrical switching device configured to control power to a load;

a zero-crossing detector configured to detect a zero-crossing associated with the electrical switching device; and

a controller configured to actuate the electrical switching device in response to the zero-crossing detector and a calibration time associated with an actuation of the electrical switching device;

wherein the controller is configured to measure a delay time between an energization of the electrical switching device and an actuation of the electrical switching device.

2. The circuit of claim 1, wherein:

the controller is configured to receive a zero-crossing event from the zero-crossing detector and actuate the electrical switching device a second delay time after the zero-crossing event; and

the second delay time is substantially equal to a difference between the calibration time and an integer multiple of a zero-crossing period.

3. The circuit of claim 1, wherein the controller is configured to adjust the calibration time in response to the measured delay time.

4. The circuit of claim 1, wherein the controller is configured to repeatedly measure the delay time and detect a variation of the measured delay time that is greater than or equal to a threshold.

5. The circuit of claim 1, further comprising:

a position sensor configured to sense a state of the electrical switching device.

6. The circuit of claim 5, wherein the controller is configured to measure a delay time between an energization of the electrical switching device and a change in the state sensed by the position sensor.

7. A method comprising:

detecting a zero-crossing associated with an electrical switching device;

actuating the electrical switching device in response to the zero-crossing and a stored actuation time;

measuring a delay time between an energization of the electrical switching device and an actuation of the electrical switching device; and

adjusting the stored actuation time in response to the measured delay time.

8. The method of claim 7, further comprising:

actuating the electrical switching device a second delay time after the zero-crossing;

wherein the second delay time is substantially equal to a difference between the stored actuation time and an integer multiple of a zero-crossing period.

9. The method of claim 7, further comprising:

repeatedly measuring the delay time; and

detecting variation of the measured delay time that is greater than or equal to a threshold.

10. The method of claim 7, further comprising:

sensing a state of the electrical switching device; and

measuring a delay time between an energization of the electrical switching device and a change in the sensed state.

11. A circuit comprising:

a clamp configured to clamp an alternating current (AC) signal;

a pulse generator configured to generate a pulse in response to an edge of the clamped AC signal; and

an isolator coupled to the pulse generator and configured to be actuated by the pulse.

12. The circuit of claim 11, further comprising:

a charge storage device;

an isolator including an actuating element;

a first current path from the charge storage device through the actuating element; and

a second current path to the charge storage device through the actuating element;

wherein;

the first path is different from the second path; and

the first current path and the second current path pass through the actuating element in the same direction.

13. The circuit of claim 12, further comprising:

a first diode coupled between the charge storage device and a first terminal of the actuating element; and

a second diode coupled between the charge storage device and a second terminal of the actuating element.

14. The circuit of claim 13, further comprising:

a transistor coupled to the first terminal of the actuating element;

a third diode coupled between the second terminal of the actuating element and a common node coupled to a control terminal of the transistor; and

a drive circuit configured to drive the common node with the clamped AC signal.

15. A method comprising:

clamping an alternating current (AC) signal to generate a clamped AC signal;

generating a pulse in response to an edge of the clamped AC signal; and

propagating the pulse through an isolator.

16. The method of claim 15, further comprising:

charging a charge storage device through an actuation element of the isolator in response to a first edge of the clamped AC signal; and

discharging the charge storage device through the actuation element of the isolator in response to a second edge of the clamped AC signal;

wherein current flowing through the actuation element during the charging of the charge storage device flows in substantially the same directions as current flowing through the actuation element during the discharging of the charge storage device.

17. The method of claim 16, wherein:

the charging of the charge storage device includes charging the charge storage device through a first diode coupled between the charge storage device and a first terminal of the actuating element; and

the discharging of the charge storage device includes discharging the charge storage device through a second diode coupled between the charge storage device and a second terminal of the actuating element.

18. The method of claim 16, wherein:

the charging of the charge storage device includes charging the charge storage device through a transistor coupled to the first terminal of the actuating element;

the discharging of the charge storage device includes discharging the charge storage device through a third diode coupled between the second terminal of the actuating element and a common node coupled to a control terminal of the transistor; and

the method further comprises driving the common node with the clamped AC signal.

19. A circuit, comprising:

a transistor including a control node configured to drive a dimming output in response to a voltage on the control node;

at least two isolators configured to cause each direct current (DC) current path from the control node to be substantially non-conducting when a power supply is disabled, the at least two isolators comprising;

a first isolator configured to be substantially non-conducting when a power supply is disabled; and

a second isolator configured to be substantially non-conducting when the power supply is disabled; and

the circuit further comprises a resistor network coupled between the first isolator and the second isolator.

20. The circuit of claim 19, wherein the resistor network further comprises:

a first resistor coupled between the first isolator and the control node; and

a second resistor coupled between the second isolator and the control node.

21. The circuit of claim 20, further comprising:

a first bias network coupled between the power supply and a control input of the first isolator; and

a second bias network coupled between the power supply and a control input of the second isolator;

wherein;

the first isolator is coupled between the dimming output and the first resistor;

the second isolator is coupled between the control node and the second resistor; and

the first and second bias networks are configured to disable the first and second isolators, respectively, when the power supply is disabled.

22. A circuit comprising:

a transistor including a control node configured to drive a dimming output in response to a voltage on the control node;

at least one isolator configured to cause each direct current (DC) current path from the control node to be substantially non-conducting when a power supply is disabled; and

a capacitor coupled between the control node and the dimming output.

23. A method comprising:

coupling a dimming signal to a control node through a first isolator;

driving a dimming output in response to the control node;

coupling the dimming output to the control node through a second isolator; and

substantially disabling the first isolator and a second isolator if a power supply is disabled.

24. The method of claim 23, further comprising substantially disabling direct current (DC) feedback paths from the control node if the power supply is disabled.

25. The method of claim 23, further comprising:

charging the control node to a voltage by coupling the dimming signal to the control node through a first isolator; and

substantially maintaining the voltage on the control node if the power supply is disabled.

26. The method of claim 23, further comprising substantially maintaining a voltage between the dimming output and the control node if the power supply is disabled.