Liquid crystal display device

• US 8,325,285 B2
• Filed: 12/21/2011
• Issued: 12/04/2012
• Est. Priority Date: 07/06/2007
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Suzuki, Yukie, Kuwabara, Hideaki, Kimura, Hajime
• Primary Examiner(s): Healy, Brian
• Application Number:
  US13/332,786
• Publication Number:
  US 20120086012A1
• Time in Patent Office: 349 Days
• Field of Search: 349/43, 349/42, 349/56, 349/138, 349/139, 349/142, 349/143, 349/147, 349/104, 349/106, 349/123, 349/130, 349/155, 257/72, 257/59, 257/29, 257/E21.001, 257/E33.001
• US Class Current: 349/43
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/1339 Gaskets; Spacers; Sealing of cells
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/458 for thin film silicon, e.g. source or drain electrode
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/78678 with inverted-type structure, e.g. with bottom gate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A method of manufacturing, with high mass productivity, liquid crystal display devices having highly reliable thin film transistors with excellent electric characteristics is provided. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.

Claims

1. A display device comprising:

a gate wiring;

a transistor comprising a first semiconductor layer, a second semiconductor layer including an impurity element imparting one conductivity type, and a part of the gate wiring;

a pixel electrode electrically connected to the transistor; and

a counter electrode over the pixel electrode,

wherein a first region includes a second region not overlapping with the pixel electrode,

wherein the first region is a region where a first color film, a second color film, a third color film, a light shielding film, a projection, and the counter electrode are overlapped with one another,

wherein the first region overlaps with the gate wiring, and

wherein the second semiconductor layer includes a microcrystalline semiconductor.

2. The display device according to claim 1,

wherein the first color film, the second color film, and the third color film are located between the light shielding film and the counter electrode, and

wherein the projection is located between the gate wiring and the counter electrode.

3. The display device according to claim 1, wherein the display device is a vertical alignment liquid crystal display device.

4. The display device according to claim 1, wherein the gate wiring comprises metal.

17. The display device according to claim 1,

wherein the first semiconductor layer and the second semiconductor layer are overlapped with the first region.

21. The display device according to claim 1, wherein the projection serves as a spacer.

5. A display device comprising:

a gate wiring;

a transistor comprising a first semiconductor layer, a second semiconductor layer including an impurity element imparting one conductivity type, and a part of the gate wiring;

a pixel electrode electrically connected to the transistor; and

a counter electrode over the pixel electrode,

wherein a first region includes a second region not overlapping with the pixel electrode,

wherein the first region is a region where a first color film, a second color film, a third color film, a light shielding film, a projection, and the counter electrode are overlapped with one another,

wherein the first region overlaps with the gate wiring,

wherein the pixel electrode is provided with a slit, and

wherein the second semiconductor layer includes a microcrystalline semiconductor.

6. The display device according to claim 5,

wherein the first color film, the second color film, and the third color film are located between the light shielding film and the counter electrode, and

wherein the projection is located between the gate wiring and the counter electrode.

7. The display device according to claim 5, wherein the display device is a vertical alignment liquid crystal display device.

8. The display device according to claim 5, wherein the gate wiring comprises metal.

18. The display device according to claim 5,

wherein the first semiconductor layer and the second semiconductor layer are overlapped with the first region.

22. The display device according to claim 5, wherein the projection serves as a spacer.

9. A display device comprising:

a gate wiring;

a first transistor comprising a first semiconductor layer, a second semiconductor layer including an impurity element imparting one conductivity type, and a first part of the gate wiring;

a first pixel electrode electrically connected to the first transistor;

a second transistor comprising a second part of the gate wiring;

a second pixel electrode electrically connected to the second transistor; and

a counter electrode over the first pixel electrode,

wherein a first region includes a second region not overlapping with the first pixel electrode,

wherein the first region is a region where a first color film, a second color film, a third color film, a light shielding film, a projection, and the counter electrode are each overlapped with one another,

wherein the first region overlaps with the gate wiring, and

wherein the second semiconductor layer includes a microcrystalline semiconductor.

10. The display device according to claim 9,

wherein the first color film, the second color film, and the third color film are located between the light shielding film and the counter electrode, and

wherein the projection is located between the gate wiring and the counter electrode.

11. The display device according to claim 9, wherein the display device is a vertical alignment liquid crystal display device.

12. The display device according to claim 9, wherein the gate wiring comprises metal.

19. The display device according to claim 9,

wherein the first semiconductor layer and the second semiconductor layer are overlapped with the first region.

23. The display device according to claim 9, wherein the projection serves as a spacer.

13. A display device comprising:

a gate wiring;

a first transistor comprising a first semiconductor layer, a second semiconductor layer including an impurity element imparting one conductivity type, and a first part of the gate wiring;

a first pixel electrode electrically connected to the first transistor;

a second transistor comprising a second part of the gate wiring;

a second pixel electrode electrically connected to the second transistor; and

a counter electrode over the first pixel electrode,

wherein a first region includes a second region not overlapping with the first pixel electrode,

wherein the first region is a region where a first color film, a second color film, a third color film, a light shielding film, a projection, and the counter electrode are each overlapped with one another, and

wherein the first region overlaps with the gate wiring

wherein the first pixel electrode is provided with a slit, and

wherein the second semiconductor layer includes a microcrystalline semiconductor.

14. The display device according to claim 13,

wherein the first color film, the second color film, and the third color film are located between the light shielding film and the counter electrode, and

wherein the projection is located between the gate wiring and the counter electrode.

15. The display device according to claim 13, wherein the display device is a vertical alignment liquid crystal display device.

16. The display device according to claim 13, wherein the gate wiring comprises metal.

20. The display device according to claim 13,

wherein the first semiconductor layer and the second semiconductor layer are overlapped with the first region.

24. The display device according to claim 13, wherein the projection serves as a spacer.