Multicore processor and method of use that adapts core functions based on workload execution

• US 8,327,126 B2
• Filed: 08/25/2008
• Issued: 12/04/2012
• Est. Priority Date: 08/25/2008
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Bell, Robert H. Jr., Capps, Louis Bennie Jr., Cook, Thomas Edward, Daves, Glenn G., Newhart, Ronald Edward, Paolini, Michael A., Shapiro, Michael Jay
• Primary Examiner(s): Rahman, Fahmida
• Application Number:
  US12/197,357
• Publication Number:
  US 20100049963A1
• Time in Patent Office: 1,562 Days
• Field of Search: 713/1, 713/2, 713/100, 718100-106, 712 15- 43
• US Class Current: 713/100
• CPC Class Codes: G06F 15/7871 Reconfiguration support, e.g. configuration loading, configuration switching, or hardware OS

Abstract

A processor has multiple cores with each core having an associated function to support processor operations. The functions performed by the cores are selectively altered to improve processor operations by balancing the resources applied for each function. For example, each core comprises a field programmable array that is selectively and dynamically programmed to perform a function, such as a floating point function or a fixed point function, based on the number of operations that use each function. As another example, a processor is built with a greater number of cores than can be simultaneously powered, each core associated with a function, so that cores having functions with lower utilization are selectively powered down.

Claims

1. A method for re-configuration of a processor having plural cores to execute a workload, at least some of the plural cores having plural selectable functions, the method comprising:

setting a first function for at least one of the plural cores, and a second function for at least another of the plural cores, the first and second functions selected from the plural selectable functions, each selectable function associated with execution of a predetermined workload type executing on a core, wherein the setting is based on predicted function utilization with the workload;

monitoring utilization of at least some of the plural cores;

detecting a higher utilization of the at least one of the plural cores having the first of the plural functions relative to the at least another of the plural cores having the second of the plural functions; and

in response to detecting, re-configuring at least one of the plural cores having the second function to have the first function by replacing a program in a programmable array to change the function at the at least one of the plural cores from the second function to the first function to balance utilization for the at least some of the cores.

2. The method of claim 1 wherein the second function comprises a floating point function and the re-configured function comprises an integer or a vector function.

3. The method of claim 1 wherein the second function comprises an integer function and the re-configured function comprises a floating point function or a vector function.

4. The method of claim 1 wherein monitoring the utilization comprises tracking instructions associated with each of the at least some of the plural cores for one or more cycles.

5. The method of claim 1 wherein setting the first and second function comprises:

analyzing instructions of the workload that will run on the processor to predict the function utilization associated with the instructions; and

setting function according to the predicted function utilization.

6. The method of claim 5 wherein analyzing the instructions comprises compiling the instructions.

7. The method of claim 5 wherein analyzing the instructions comprises performing runtime optimization.

8. The method of claim 1 wherein re-configuring the at least one of the plural cores further comprises re-programming a field programmable array associated with the at least one of the plural cores.

9. A processor comprising:

plural cores, each core having one of plural functions, each function associated with a workload executed on a core, at least one re-configurable core of the plural cores having a programmable array with a selected of at least a first or second program, the first program configuring the re-configurable core to a first of the plural functions associated with execution of a first operation on the re-configurable core, the second program configuring the re-configurable core to a second of the plural functions associated with execution of a second operation on the re-configurable core;

a performance monitor interfaced with the plural cores and operable to monitor utilization of the cores to detect higher utilization of cores having the first function relative to the second function; and

a function manager interfaced with the performance monitor and operable to selectively alter the operation of the cores to manage utilization of the cores by replacing the program of the programmable array to change the function at the at least one re-configurable core from the second function to the first function.

10. The processor of claim 9 wherein the plural functions comprise a scalar floating point unit and a VMX unit having floating point and integer instructions.

11. The processor of claim 9 wherein the plural functions comprise a floating point unit and an integer unit.

12. The processor of claim 9 wherein each of the re-configurable cores comprises a field programmable array and the function manager comprises a programmer operable to selectively re-program the field programmable array to perform said one of plural functions.

13. The processor of claim 9 further comprising a performance history interfaced with the function manager and operable to track the altering of the operation of the cores.

14. A method for configuration of a processor to execute a software workload that uses at least one of a floating point and an integer function, the processor having plural cores, at least some of the plural cores having one of the floating point and integer functions, the method comprising:

setting the integer and floating point functions to an initial number of cores based on predetermined function utilization as asserted with the workload;

analyzing execution of the software workload on the processor to determine a higher utilization of the at least some of the plural cores having one of the floating point and integer functions relative to the at least some of the plural cores having the other of the floating point and integer functions;

selectively re-programming at least some of the cores based on the utilization of the cores having the floating point and integer functions, the re-programming altering the function executed on at least one of the cores to perform the floating point or integer function having the higher utilization instead of the other function; and

performing the software workload with the processor.

15. The method of claim 14 wherein selectively re-programming further comprises re-programming a field programmable array associated with a core to alter the core function from a floating point function function to a integer function.