Data storage device with verify on write command

• US 8,327,220 B2
• Filed: 10/10/2011
• Issued: 12/04/2012
• Est. Priority Date: 04/08/2009
• Status: Active Grant

• Current Assignee: Google LLC (Alphabet Inc.)
• Original Assignee: Google Inc. (Alphabet Inc.)
• Inventors: Borchers, Albert T., Swing, Andrew T., Sprinkle, Robert S., Klaus, Jason W.
• Primary Examiner(s): BRITT, CYNTHIA H
• Application Number:
  US13/269,985
• Publication Number:
  US 20120030507A1
• Time in Patent Office: 421 Days
• Field of Search: 714/758, 714/719, 714/723, 714/764, 714/819
• US Class Current: 714/758
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0813 with a network or matrix configuration
• CPC Class Codes: G06F 2212/7205 Cleaning, compaction, garbage collection, erase control
• CPC Class Codes: G11C 2029/0409 Online test
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents
• CPC Class Codes: G11C 29/88 with partially good memories

Abstract

A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive a verify on write command from the host using the interface, write data to one of the memory devices, read the data from the memory device, calculate an error correction code for the data as the data is being read, verify the data was written correctly to the memory device using the error correction code and communicate results to the host using the interface.

Claims

1. A data storage device comprising:

an interface that is arranged and configured to interface with a host;

a command bus;

multiple memory devices that are operably coupled to the command bus; and

a controller that is operably coupled to the interface and to the command bus, wherein the controller is arranged and configured to;

receive a verify on write command from the host using the interface;

responsive to the verify on write command, perform the actions of writing data to one of the memory devices, reading the data from the memory device, calculating an error correction code for the data as the data is being read, verifying the data was written correctly to the memory device using the error correction code, and communicating results to the host using the interface.

2. The data storage device of claim 1 wherein the controller is arranged and configured to calculate the error correction code without using a buffer.

3. The data storage device of claim 1 wherein the memory devices include flash memory devices.

4. The data storage device of claim 1 wherein the controller reads the data from the memory device without receiving a read command from the host.

5. The data storage device of claim 1 wherein the controller is further configured to re-write the data to a different memory location on the memory device if the error correction code indicates that the data contained errors as determined when verifying the data.

6. The data storage device of claim 1 wherein the controller is further configured to re-write the data to a same memory location on the memory device if the error correction code indicates that the data contained errors as determined when verifying the data.

7. The data storage device of claim 1 wherein the controller is configured to write data to one of the memory devices, read the data from the memory device, calculate the error correction code for the data as the data is being read and verify the data was written correctly to the memory device using the error correction code prior to communicating the results to the host.

8. A non-transitory recordable storage medium having recorded and stored thereon instructions that, when executed, perform the actions of:

receiving, at a controller that is arranged and configured to control multiple memory devices, a verify on write command from a host using an interface; and

responsive to the verify on write command, performing the actions of;

writing data to one of the memory devices;

reading the data from the memory device;

calculating an error correction code for the data as the data is being read;

verifying the data was written correctly to the memory device using the error correction code; and

communicating results to the host using the interface.

9. The recordable storage medium of claim 8 wherein the instructions that, when executed, perform the action of calculating the error correction code comprises instructions that, when executed, perform the actions of calculating the error correction code without using a buffer.

10. The recordable storage medium of claim 8 wherein the memory devices include flash memory devices.

11. The recordable storage medium of claim 8 wherein the instructions that, when executed, perform the action of reading the data from the memory device comprise instructions that, when executed, perform the action reading the data from the memory device without receiving a read command from the host.

12. The recordable storage medium of claim 8 further comprising instructions that, when executed, perform the action of re-writing the data to a different memory location on the memory device if the error correction code indicates that the data contained errors as determined when verifying the data.

13. The recordable storage medium of claim 8 further comprising instructions that, when executed, perform the action of re-writing the data to a same memory location on the memory device if the error correction code indicates that the data contained errors as determined when verifying the data.

14. The recordable storage medium of claim 8 wherein the instructions that, when executed, perform the action of writing data to one of the memory devices, reading the data from the memory device, calculating the error correction code for the data as the data is being read and verifying the data was written correctly to the memory device using the error correction code are performed prior to communicating the results to the host.

15. A method, comprising:

receiving, at a controller that is arranged and configured to control multiple memory devices, a verify on write command from a host using an interface; and

responsive to the verify on write command, performing the actions of;

writing data to one of the memory devices;

reading the data from the memory device;

calculating an error correction code for the data as the data is being read;

verifying the data was written correctly to the memory device using the error correction code; and

communicating results to the host using the interface.

16. The method as in claim 15 wherein calculating the error correction code comprises calculating the error correction code without using a buffer.

17. The method as in claim 15 wherein the memory devices include flash memory devices.

18. The method as in claim 15 wherein reading the data from the memory device reading the data from the memory device without receiving a read command from the host.

19. The method as in claim 15 further comprising re-writing the data to a different memory location on the memory device if the error correction code indicates that the data contained errors as determined when verifying the data.

20. The method as in claim 15 further comprising re-writing the data to a same memory location on the memory device if the error correction code indicates that the data contained errors as determined when verifying the data.

21. The method as in claim 15 wherein writing data to one of the memory devices, reading the data from the memory device, calculating the error correction code for the data as the data is being read and verifying the data was written correctly to the memory device using the error correction code are performed prior to communicating the results to the host.