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Low noise, high CMRR and PSRR input buffer

  • US 8,330,537 B1
  • Filed: 03/18/2011
  • Issued: 12/11/2012
  • Est. Priority Date: 07/23/2010
  • Status: Active Grant
First Claim
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1. A circuit, comprising:

  • a first amplifier circuit coupled to receive a first part of a differential input signal and a first feedback signal and to generate a first part of a differential output signal being the first feedback signal;

    a first comparator coupled to compare the first part of the differential input signal and a first voltage and to generate a first pair of select signals, the comparator having a comparison threshold with hysteresis;

    a second amplifier circuit coupled to receive a second part of the differential input signal and a second feedback signal and to generate a second part of the differential output signal being the second feedback signal;

    a second comparator coupled to compare the second part of the differential input signal and the first voltage, the comparator having a comparison threshold with hysteresis,wherein each of the first and second amplifier circuits comprises first and second complementary differential input stages, each of the first and second complementary differential input stages being configured to receive the respective first or second part of the differential input signal and the respective first or second feedback signal, andwherein the first and second comparators generate respective first and second pairs of select signals to turn on only one of the first or the second differential input stage in each amplifier circuit depending on a value of the respective part of the differential input signal, the first and second complementary differential input stages of each amplifier circuit not being turned on at the same time.

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