Low noise, high CMRR and PSRR input buffer
First Claim
1. A circuit, comprising:
- a first amplifier circuit coupled to receive a first part of a differential input signal and a first feedback signal and to generate a first part of a differential output signal being the first feedback signal;
a first comparator coupled to compare the first part of the differential input signal and a first voltage and to generate a first pair of select signals, the comparator having a comparison threshold with hysteresis;
a second amplifier circuit coupled to receive a second part of the differential input signal and a second feedback signal and to generate a second part of the differential output signal being the second feedback signal;
a second comparator coupled to compare the second part of the differential input signal and the first voltage, the comparator having a comparison threshold with hysteresis,wherein each of the first and second amplifier circuits comprises first and second complementary differential input stages, each of the first and second complementary differential input stages being configured to receive the respective first or second part of the differential input signal and the respective first or second feedback signal, andwherein the first and second comparators generate respective first and second pairs of select signals to turn on only one of the first or the second differential input stage in each amplifier circuit depending on a value of the respective part of the differential input signal, the first and second complementary differential input stages of each amplifier circuit not being turned on at the same time.
1 Assignment
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Accused Products
Abstract
A rail-to-rail buffer receiving a differential input signal and generating a differential output signal includes first and second amplifier circuits configured in a pseudo differential buffer structure and first and second comparators coupled to compare the respective part of the differential input signal and a first voltage and to generate select signals. Each of the first and second amplifier circuits includes first and second complementary differential input stages and the first and second comparators generate respective select signals to turn on only one of the first or the second differential input stage in each amplifier circuit depending on a value of the respective part of the differential input signal. In operation, the first and second complementary differential input stages of each amplifier circuit not being turned on at the same time.
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Citations
25 Claims
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1. A circuit, comprising:
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a first amplifier circuit coupled to receive a first part of a differential input signal and a first feedback signal and to generate a first part of a differential output signal being the first feedback signal; a first comparator coupled to compare the first part of the differential input signal and a first voltage and to generate a first pair of select signals, the comparator having a comparison threshold with hysteresis; a second amplifier circuit coupled to receive a second part of the differential input signal and a second feedback signal and to generate a second part of the differential output signal being the second feedback signal; a second comparator coupled to compare the second part of the differential input signal and the first voltage, the comparator having a comparison threshold with hysteresis, wherein each of the first and second amplifier circuits comprises first and second complementary differential input stages, each of the first and second complementary differential input stages being configured to receive the respective first or second part of the differential input signal and the respective first or second feedback signal, and wherein the first and second comparators generate respective first and second pairs of select signals to turn on only one of the first or the second differential input stage in each amplifier circuit depending on a value of the respective part of the differential input signal, the first and second complementary differential input stages of each amplifier circuit not being turned on at the same time. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A circuit, comprising:
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first and second amplifiers receiving a differential input signal formed by a first input signal and a second input signal, and generating a differential output signal formed by a first output signal and a second output signal; the first amplifier receiving the first input signal and a first feedback signal and generating the first output signal, which corresponds to the first feedback signal; a first comparator coupled to compare the first input and a first voltage and to generate a first pair of select signals; the second amplifier receiving the second input signal and a second feedback signal and generating the second output signal, which corresponds to the second feedback signal; a second comparator coupled to compare the second input signal and the first voltage, wherein each of the first and second amplifiers comprises first and second complementary differential input stages, each of the first and second complementary differential input stages being configured to receive the respective first or second input signal and the respective first or second feedback signal, and wherein the first and second comparators generate respective first and second pairs of select signals to activate only one of the first or the second differential input stage in each amplifier depending on a value of the respective first or second input signal, the first and second complementary differential input stages of each amplifier not being activated at the same time. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25)
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Specification