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Microchips with multiple internal hardware-based firewalls and dies

  • US 8,332,924 B2
  • Filed: 06/30/2008
  • Issued: 12/11/2012
  • Est. Priority Date: 11/29/1996
  • Status: Expired due to Fees
First Claim
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1. A microchip for a computer configured to connect to at least one network of computers, said microchip comprising:

  • at least a first internal hardware-based firewall, said first internal hardware-based firewall configured to deny access to at least a portion of said microchip from said network;

    at least one general purpose microprocessor including at least two general purpose cores or general purpose processing units;

    a plurality of dies, at least two of said dies made by a separate fabrication process and assembled into a package with separate die sections connected directly; and

    at least one memory component located inside of at least a second internal hardware-based firewall that is located between said memory component and at least one said core or processing unit with which said memory component is associated; and

    whereinat least a first said core or processing unit is located within said first portion of said microchip that is protected by at least said first internal hardware-based firewall;

    at least a second said core or processing unit is located within a second portion of said microchip that is not protected by at least said first internal hardware-based firewall; and

    at least said second core or processing unit is separated from said first core or processing unit by at least said first internal hardware-based firewall and is located between at least said first internal hardware-based firewall and said at least one network of computers.

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