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Top gate thin-film transistor, display device, and electronic apparatus

  • US 8,334,553 B2
  • Filed: 02/14/2011
  • Issued: 12/18/2012
  • Est. Priority Date: 02/15/2010
  • Status: Active Grant
First Claim
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1. A top gate type thin-film transistor formed on a transparent substrate, comprising:

  • a patterned light blocking film,a base layer,a patterned crystalline silicon film,a gate insulating film, anda patterned gate electrode film are sequentially laminated on the transparent substrate,the patterned crystalline silicon film comprises;

    a drain region and a source region formed of regions doped with an impurity at high concentration,a channel region having length L that overlaps the patterned gate electrode film; and

    a drain side LDD region having length d and a source side LDD region having length d formed of regions doped with an impurity at low concentration that are in contact with the channel region on both sides of the gate electrode film,the patterned light blocking film is divided into a region on a drain side and a region on a source side across the channel region and arranged not to overlap the channel region,a space of an interval x equal to or larger than the length L of the channel region is provided between the region on the drain side and the region on the source side of the divided light blocking films,the region on the drain side of the divided light blocking films is arranged to overlap at least a part of the drain side LDD region having length d and a part of the drain region, andthe region on the source side of the divided light blocking films is arranged to overlap at least a part of the source side LDD region having length d and a part of the source region, andthe interval x of the space provided between the region on the drain side of the light blocking film and the region on the source side of the light blocking film, which are divided across the channel region, is selected to satisfy the following equation (1) with respect to the length L of the channel region, length d of the drain side LDD region, and length d of the source side LDD region;


    L+2d≧

    x≧

    L




    eq.(1).

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