Method of operating a flash memory device

• US 8,335,118 B2
• Filed: 03/22/2010
• Issued: 12/18/2012
• Est. Priority Date: 08/08/2007
• Status: Active Grant

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: Cha, Jae Won, Won, Sam Kyu, Baek, Kwang Ho
• Primary Examiner(s): Nguyen, Viet Q
• Application Number:
  US12/729,190
• Publication Number:
  US 20100177565A1
• Time in Patent Office: 1,002 Days
• Field of Search: 365/201, 365/200, 365/189.05, 365/189.07, 365/185.09
• US Class Current: 365/201
• CPC Class Codes: G11C 16/20 Initialising; Data preset; Chip identification

Abstract

A flash memory device is disclosed. The flash memory device includes a memory cell array configured to have memory cells for storing data, and store initial data in a part of the memory cells, a page buffer circuit configured to have page buffers for providing data to be programmed in the memory cell or reading data from the memory cell, a controller configured to control the page buffer circuit so that the initial data stored in the memory cell array are read when operation of the flash memory device is started, discriminate error of the read initial data, and amend the error of the initial data, and an initial data latching circuit for latching the initial data of which the error is amended by the controller.

Claims

1. A method of operating a flash memory device, the method comprising:

assigning some memory cells of a memory cell array to an initial data storing unit;

storing initial data on the initial data storing unit;

reading the initial data in accordance with address information on power up;

determining whether or not the read initial data has an error;

reading again the initial data stored in the initial data storing unit if the determination has been made that the initial data has an error;

storing temporarily the initial data to an initial data latching circuit; and

controlling an operation of the flash memory device in accordance with the stored initial data.

2. The method of claim 1, wherein the determining step is performed by using inverted initial data obtained by inverting the initial data after the reading step.

3. The method of claim 1, further comprising changing the initial data to data outputted from an outside device in accordance with address information related to the initial data.

4. The method of claim 2, wherein the determining step includes:

comparing the initial data with the inverted initial data to determine whether each logic level of the inverted initial data is equal each logic level of the initial data.

5. The method of claim 1, further comprising:

determining whether or not the read initial data has an error by using an error determination data which is set to “

0”

when the number of “

1”

in the initial data is an even number and to “

1”

when the number of “

1”

in the initial data is an odd number after the reading step; and

correcting the error of the read initial data if the determination has been made that the read initial data has an error.

6. The method of claim 5, wherein the determining step includes:

comparing the number of “

1”

in the read initial data with the error determination.