Apparatus and method for establishing device identifiers for serially interconnected devices

• US 8,335,868 B2
• Filed: 05/18/2007
• Issued: 12/18/2012
• Est. Priority Date: 03/28/2006
• Status: Expired due to Fees

• Current Assignee: MOSAID Technologies Inc. (f/k/a Conversant Intellectual Property Management)
• Original Assignee: Mosaid Technologies Incorporated (MOSAID Technologies Inc. (f/k/a Conversant Intellectual Property Management))
• Inventors: Pyeon, Hong Beom, Oh, HakJune, Kim, Jin-Ki
• Primary Examiner(s): RHU, KRIS M
• Application Number:
  US11/750,649
• Publication Number:
  US 20070233917A1
• Time in Patent Office: 2,041 Days
• Field of Search: 711/154, 711/167
• US Class Current: 710/8
• CPC Class Codes: G06F 13/4291 using a clocked protocol

Abstract

A method or apparatus operates a multitude of devices in a serial interconnection configuration to establish a device identifier (ID) for each device. An input signal is transmitted through a serial interconnection to a first device using inputs that are also used by the first device to input other information thereto (e.g., data, commands, control signals). A generating circuit generates a device ID in response to the input signal. A transfer circuit then transfers an output signal associated with the device ID to a second device through a serial output of the first device. The serial output is also used by the first device to output other information (e.g., signals, data) to another device in the serial interconnection configuration.

Claims

1. A device identifier establisher for establishing a device identifier (ID) for a device configured in a serial interconnection configuration having a plurality of devices, the device identifier establisher comprising:

a clock input for receiving a clock signal;

an ID producer for producing a device ID in response to an M-bit input signal received at an input of the device, the M-bit input signal received at the input of the device in response to an assertion of an input enable signal and including an N-bit ID corresponding to the device ID, and outputting an M-bit output signal in response to an assertion of an output enable signal, the M-bit output signal including an N-bit data corresponding to the device ID through an output of the device to a subsequent device in the serial interconnection configuration synchronously with the clock signal, M and N being an integer that is one or greater than one;

an ID register for storing the N-bit data as an assigned ID for the device; and

a control input for receiving a control signal, the ID register being configured to store the N-bit data as an assigned ID in response to the received control signal and the received control signal being produced in response to the output enable signal.

2. The device identifier establisher of claim 1, wherein the M-bit input signal received at the device includes a previous device ID corresponding to a previous device in the serial interconnection configuration, and the device ID associated with the M-bit output signal includes the N-bit data corresponding to the device ID of the device receiving the M-bit input signal.

3. The device identifier establisher of claim 1, wherein the plurality of devices is connected with a link.

4. The device identifier establisher of claim 1, wherein each of the plurality of devices comprises a memory device.

5. The device identifier establisher of claim 1, wherein the ID producer comprises:

an ID calculator for determining the N-bit ID from the M-bit input signal and producing a calculated value based on the N-bit ID and a predetermined number; and

an ID provider for providing the device ID corresponding to the N-bit data in accordance with the calculated value.

6. The device identifier establisher of claim 5, wherein the calculated value is a calculation result of the N-bit ID and an integer.

7. The device identifier establisher of claim 5, wherein the ID provider includes a shift circuit for shifting out the N-bit ID synchronously with clock.

8. The device identifier establisher of claim 5, further comprising an ID production controller for controlling the production of the N-bit ID in response to commands in the M-bit input signal.

9. The device identifier establisher of claim 1, wherein the device receives command or data signals at the input and transmits the command or data signals at the output.

10. A device configured in a serial interconnection configuration of a plurality of devices, the device comprising:

a clock input for receiving a clock signal;

a device identifier (ID) establisher for establishing a device ID for the device, the device ID establisher including an ID producer configured to;

provide the device ID in response to an M-bit input signal received at an input of the device, the M-bit input signal received in response to an assertion of an input enable signal and including an N-bit ID corresponding to the device ID;

output an M-bit output signal in response to an assertion of an output enable signal, the M-bit output signal including an N-bit data corresponding to the device ID through an output of the device to a subsequent device in the serial interconnection configuration synchronously with the clock signal, M and N being an integer that is one or greater than one;

an ID register for storing the N-bit data as an assigned ID for the device; and

a control input for receiving a control signal, the ID register being configured to store the N-bit data as an assigned ID in response to the received control signal, the received control signal being produced in response to the output enable signal.

11. The device of claim 10, wherein each of the plurality of devices comprises a memory device.

12. The device of claim 11, wherein the memory device is a random access memory or a Flash memory.

13. The device of claim 10, wherein the M-bit input signal received at the device includes a previous device ID corresponding to a previous device in the serial interconnection configuration, and the device ID included in the M-bit output signal includes the N-bit data corresponding to the device ID of the device receiving the input signal.

14. The device of claim 10, wherein the plurality of devices are connected with a link.

15. The device of claim 10, wherein the ID producer comprises:

a calculator for producing a calculated value based on the N-bit ID and a predetermined number; and

an ID provider for providing the device ID corresponding to the N-bit data in accordance with the calculated value.

16. The device of claim 15, wherein the calculated value is a calculation result of the N-bit ID and an integer.

17. The device of claim 15, wherein the ID provider includes a shift circuit for shifting out the N-bit ID synchronously with clock.

18. The device of claim 15, further comprising an ID production controller for controlling the production of the N-bit ID in response to commands in the M-bit input signal.

19. The device of claim 10, wherein the device receives command or data signals at the input and transmits the command or data signals at the output.

20. A serial interconnection configuration of a plurality of devices, each of the devices comprising:

an input for receiving an M-bit input signal in response to an assertion of an input enable signal;

an output for transferring an M-bit output signal in response to an assertion of an output enable signal;

a clock input for receiving a clock signal;

a device identifier (ID) establisher for establishing a device ID for the device, the device ID establisher having an ID producer for providing the device ID in response to the M-bit input signal received at the input of the device, the M-bit input signal including a value associated with the device ID of the device, the M-bit output signal including an N-bit data corresponding to the device ID through the output of the device to a subsequent device in the serial interconnection configuration synchronously with the clock signal, M and N being an integer that is one or greater than one;

an ID register for storing the N-bit data as an assigned ID for the device; and

a control input for receiving a control signal, the ID register being configured to store the N-bit data as an assigned ID in response to the received control signal, the received control signal being produced in response to the output enable signal.

21. The serial interconnection configuration of claim 20, wherein the plurality of devices is connected with a link.

22. The serial interconnection configuration of claim 20, wherein each of the plurality of devices comprises a memory device.

23. The serial interconnection configuration of claim 20, wherein the memory device is a random access memory or a Flash memory.

24. The serial interconnection configuration of claim 20, wherein the input signal received at the device includes a previous device ID corresponding to a previous device in the serial interconnection configuration, and the device ID associated with the M-bit output signal includes the N-bit data corresponding to the device ID of the device receiving the input signal.

25. The serial interconnection configuration of claim 20, wherein the ID producer comprises:

a calculator for producing a calculated value based on an N-bit ID and a predetermined number; and

an ID provider for providing the device ID corresponding to the N-bit data in accordance with the calculated value.

26. The serial interconnection configuration of claim 25, wherein the calculated value is a calculation result of the N-bit ID and an integer.

27. The serial interconnection configuration of claim 25, wherein the ID provider includes a shift circuit for shifting out the N-bit ID synchronously with the clock signal.

28. The serial interconnection configuration of claim 25, wherein the N-bit ID is included in the M-bit input signal.

29. The serial interconnection configuration of claim 25, further comprising an ID production controller for controlling the production of the N-bit ID in response to commands in the M-bit input signal.

30. The serial interconnection configuration of claim 22, wherein the device receives command or data signals at the input and transmits the command or data signals at the output.

31. A method for establishing a device identifier (ID) for a device configured in a serial interconnection configuration having a plurality of devices, the method comprising:

receiving a clock signal;

producing a device ID in response to an M-bit input signal, the M-bit input signal received in response to an assertion of an input enable signal, the M-bit input signal including a value associated with the device ID of the device;

outputting, to a subsequent device in the serial interconnection configuration, an M-bit output signal in response to an assertion of an output enable signal, the M-bit output signal including an N-bit data corresponding to the device ID through an output of the device;

assigning the N-bit data as the device ID for the device, the assigning comprising storing the N-bit data as an assigned ID for the device in response to a control signal, the control signal being produced in response to the output enable signal,

wherein the producing and outputting are synchronous with the clock signal and, M and N being an integer that is one or greater than one.

32. The method of claim 31, further comprising resetting the device ID of the devices to a predetermined value prior to the step of generating the ID.

33. The method of claim 32, wherein the step of resetting the device ID is performed in a parallel manner to all devices.

34. The method of claim 31, wherein the step of producing the ID is in response to an ID production command contained in the M-bit input signal.

35. The method of claim 31 wherein the step of producing the device ID comprises:

producing an N-bit ID;

calculating a value based on the N-bit ID and a predetermined number; and

providing the device ID corresponding to the N-bit data in accordance with the calculated value.

36. The method of claim 35, wherein the calculated value is a calculation result of the N-bit ID and an integer.

37. The method of claim 35, wherein the step of providing the device ID includes shifting out the N-bit ID synchronously with the clock.

38. The method of claim 35, wherein the N-bit ID is included in the M-bit input signal.

39. The method of claim 35, further comprising controlling the production of the N-bit ID in response to commands in the M-bit input signal.

40. The method of claim 35, wherein the step of calculating comprises adding the value of the integer to the value of the N-bit ID.

41. The method of claim 35, wherein the step of calculating comprises subtracting the value of the integer from the N-bit ID.