Method for fabricating semiconductor device

• US 8,338,290 B2
• Filed: 06/17/2011
• Issued: 12/25/2012
• Est. Priority Date: 01/15/2009
• Status: Active Grant

• Current Assignee: Pannova Semic, LLC (Vector Capital Corporation)
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: Morinaga, Yasunori
• Primary Examiner(s): Nikmanesh, Seahvosh J.
• Assistant Examiner(s): Seven, Evren
• Application Number:
  US13/163,189
• Publication Number:
  US 20110250750A1
• Time in Patent Office: 557 Days
• Field of Search: None
• US Class Current: 438/637
• CPC Class Codes: H01L 21/02167 the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02304 formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
• CPC Class Codes: H01L 21/02307 treatment by exposure to a liquid
• CPC Class Codes: H01L 21/321 After treatment
• CPC Class Codes: H01L 21/76834 formation of thin insulating films on the sidewalls or on top of conductors H01L21/76831 takes precedence
• CPC Class Codes: H01L 21/76877 Filling of holes, grooves or trenches, e.g. vias, with conductive material
• CPC Class Codes: H01L 21/76883 Post-treatment or after-treatment of the conductive material

Abstract

A method for fabricating a semiconductor device includes: (a) forming an interlayer insulating film on a substrate; (b) forming an interconnect in the interlayer insulating film; (c) applying an organic solution to an upper surface of the interconnect and an upper surface of the interlayer insulating film; (d) after (c), applying a silylating solution to the upper surface of the interconnect and the upper surface of the interlayer insulating film; (e) after (d), heating the substrate; and (f) forming a first liner insulating film at least on the upper surface of the interconnect.

Claims

1. A method for fabricating a semiconductor device, the method comprising:

(a) forming an interlayer insulating film on a substrate;

(b) forming an interconnect in the interlayer insulating film;

(c) feeding an organic solution to an upper surface of the interconnect and an upper surface of the interlayer insulating film;

(d) after (c), feeding a silylating solution to the upper surface of the interconnect and the upper surface of the interlayer insulating film;

(e) after (d), heating the substrate; and

(f) forming a first liner insulating film at least on the upper surface of the interconnect.

2. The method of claim 1, wherein

(c) and (d) are successively performed.

3. The method of claim 2, wherein

(d) and (e) are successively performed.

4. The method of claim 1, further comprising:

(g) after (a) and before (b), forming a hole in the interlayer insulating film; and

(h) after (g) and before (b), forming a trench in the interlayer insulating film such that part of the trench overlaps the hole when viewed from above.

5. The method of claim 4, wherein

in (b), a plug embedded in the hole and the interconnect which is embedded in the trench, and is connected to the plug are substantially simultaneously formed.

6. The method of claim 4, wherein

the interlayer insulating film includes a first interlayer insulating film in which the hole is formed, and a second interlayer insulating film which is formed on the first interlayer insulating film and in which the trench is formed,

an upper surface of the second interlayer insulating film is flush with the upper surface of the interlayer insulating film, and

the method further includes:

(i) after (g) and before (h), forming a plug embedded in the hole;

(j) after (i) and before (h), feeding an organic solution to an upper surface of the plug and an upper surface of the first interlayer insulating film;

(k) after (j) and before (h), feeding a silylating solution to the upper surface of the plug and the upper surface of the first interlayer insulating film;

(l) after (k) and before (h), heating the substrate; and

(m) before (h), forming a second liner insulating film at least on the upper surface of the plug.

7. The method of claim 1, wherein

the organic solution is the same material as a solvent of the silylating solution.

8. The method of claim 1, wherein

the organic solution is a solvent having no reactivity with a silylating agent contained in the silylating solution.

9. The method of claim 1, wherein

the organic solution contains at least one selected from the group consisting of hydrocarbons, alcohols, ketones, esters, and ethers.

10. The method of claim 1, wherein

the organic solution contains at least one selected from the group consisting of methanol, ethanol, propanol, acetone, methyl ethyl ketone, diethyl ketone, and phenol.

11. The method of claim 1, wherein

the silylating agent contained in the silylating solution includes an alkyl group having a silazane bond.

12. The method of claim 1, wherein

the first liner insulating film includes a SiCN film.

13. The method of claim 1, wherein

in (e), heating temperature is stepwise increased in heating the substrate.

14. The method of claim 13, wherein

in (e), treatment temperature of the substrate is higher than or equal to 150°

C. and lower than or equal to 450°

C.

15. The method of claim 1, wherein

the interconnect includes copper as a main component.